JAJSC51E November 2004 – March 2016 LM5107
PRODUCTION DATA.
- 1 特長
- 2 アプリケーション
- 3 概要
- 4 改訂履歴
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Layout
- 10デバイスおよびドキュメントのサポート
- 11メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報
6 Specifications
6.1 Absolute Maximum Ratings
See (1)(2)| VDD to VSS | -0.3V to 18V |
| HB to HS | −0.3V to 18V |
| LI or HI to VSS | −0.3V to VDD +0.3V |
| LO to VSS | −0.3V to VDD +0.3V |
| HO to VSS | VHS −0.3V to VHB +0.3V |
| HS to VSS(3) | −5V to 100V |
| HB to VSS | 118V |
| Junction Temperature | -40°C to +150°C |
| Storage Temperature Range | −55°C to +150°C |
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD = 10V, the negative transients at HS must not exceed -5V.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM)(1) | ±2000 | V |
(1) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Pin 6 , Pin 7 and Pin 8 are rated at 500V.
6.3 Recommended Operating Conditions
| VDD | 8V to 14V |
| HS(1) | −1V to 100V |
| HB | VHS +8V to VHS +14V |
| HS Slew Rate | < 50 V/ns |
| Junction Temperature | −40°C to +125°C |
(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD = 10V, the negative transients at HS must not exceed -5V.
6.4 Electrical Characteristics
Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO.| Symbol | Parameter | Conditions | Min(2) | Typ | Max(2) | Units |
|---|---|---|---|---|---|---|
| SUPPLY CURRENTS | ||||||
| IDD | VDD Quiescent Current | LI = HI = 0V | 0.3 | 0.6 | mA | |
| IDDO | VDD Operating Current | f = 500 kHz | 2.1 | 3.4 | mA | |
| IHB | Total HB Quiescent Current | LI = HI = 0V | 0.06 | 0.2 | mA | |
| IHBO | Total HB Operating Current | f = 500 kHz | 1.6 | 3.0 | mA | |
| IHBS | HB to VSS Current, Quiescent | VHS = VHB = 100V | 0.1 | 10 | µA | |
| IHBSO | HB to VSS Current, Operating | f = 500 kHz | 0.5 | mA | ||
| INPUT PINS LI and HI | ||||||
| VIL | Low Level Input Voltage Threshold | 0.8 | 1.8 | V | ||
| VIH | High Level Input Voltage Threshold | 1.8 | 2.2 | V | ||
| RI | Input Pulldown Resistance | 100 | 180 | 500 | kΩ | |
| UNDER VOLTAGE PROTECTION | ||||||
| VDDR | VDD Rising Threshold | VDDR = VDD - VSS | 6.0 | 6.9 | 7.4 | V |
| VDDH | VDD Threshold Hysteresis | 0.5 | V | |||
| VHBR | HB Rising Threshold | VHBR = VHB - VHS | 5.7 | 6.6 | 7.1 | V |
| VHBH | HB Threshold Hysteresis | 0.4 | V | |||
| BOOT STRAP DIODE | ||||||
| VDL | Low-Current Forward Voltage | IVDD-HB = 100 µA VDL = VDD - VHB |
0.58 | 0.9 | V | |
| VDH | High-Current Forward Voltage | IVDD-HB = 100 mA VDH = VDD - VHB |
0.82 | 1.1 | V | |
| RD | Dynamic Resistance | IVDD-HB = 100 mA | 0.8 | 1.5 | Ω | |
| LO GATE DRIVER | ||||||
| VOLL | Low-Level Output Voltage | ILO = 100 mA VOHL = VLO – VSS |
0.28 | 0.45 | V | |
| VOHL | High-Level Output Voltage | ILO = −100 mA, VOHL = VDD– VLO |
0.45 | 0.75 | V | |
| IOHL | Peak Pullup Current | VLO = 0V | 1.3 | A | ||
| IOLL | Peak Pulldown Current | VLO = 12V | 1.4 | A | ||
| HO GATE DRIVER | ||||||
| VOLH | Low-Level Output Voltage | IHO = 100 mA VOLH = VHO– VHS |
0.28 | 0.45 | V | |
| VOHH | High-Level Output Voltage | IHO = −100 mA VOHH = VHB– VHO |
0.45 | 0.75 | V | |
| IOHH | Peak Pullup Current | VHO = 0V | 1.3 | A | ||
| IOLH | Peak Pulldown Current | VHO = 12V | 1.4 | A | ||
| THERMAL RESISTANCE | ||||||
| θJA(3) | Junction to Ambient | SOIC | 160 | °C/W | ||
| WSON(1) | 40 | |||||
(1) 4 layer board with Cu finished thickness 1.5/1/1/1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50mm ground and power planes embedded in PCB. See Application Note AN-1187.
(2) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(3) The θJA is not a constant for the package and depends on the printed circuit board design and the operating conditions.
6.5 Switching Characteristics
Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO.| Symbol | Parameter | Conditions | Min(1) | Typ | Max(1) | Units |
|---|---|---|---|---|---|---|
| LM5100A | ||||||
| tLPHL | Lower Turn-Off Propagation Delay (LI Falling to LO Falling) |
27 | 56 | ns | ||
| tHPHL | Upper Turn-Off Propagation Delay (HI Falling to HO Falling) |
27 | 56 | ns | ||
| tLPLH | Lower Turn-On Propagation Delay (LI Rising to LO Rising) |
29 | 56 | ns | ||
| tHPLH | Upper Turn-On Propagation Delay (HI Rising to HO Rising) |
29 | 56 | ns | ||
| tMON | Delay Matching: Lower Turn-On and Upper Turn-Off | 2 | 15 | ns | ||
| tMOFF | Delay Matching: Lower Turn-Off and Upper Turn-On | 2 | 15 | ns | ||
| tRC, tFC | Either Output Rise/Fall Time | CL = 1000 pF | 15 | - | ns | |
| tPW | Minimum Input Pulse Width that Changes the Output | 50 | ns | |||
| tBS | Bootstrap Diode Turn-Off Time | IF = 100 mA, IR = 100 mA | 105 | ns | ||
(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
Figure 1. Timing Diagram
6.6 Typical Performance Characteristics
