JAJSD15B
March 2017 – March 2018
LM5113-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
アプリケーション概略図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input and Output
7.3.2
Start-Up and UVLO
7.3.3
HS Negative Voltage and Bootstrap Supply Voltage Clamping
7.3.4
Level Shift
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
VDD Bypass Capacitor
8.2.2.2
Bootstrap Capacitor
8.2.2.3
Power Dissipation
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントのサポート
11.1.1
関連資料
11.2
ドキュメントの更新通知を受け取る方法
11.3
コミュニティ・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DPR|10
MPSS046B
サーマルパッド・メカニカル・データ
発注情報
jajsd15b_oa
jajsd15b_pm
6.7
Typical Characteristics
Figure 2.
Peak Source Current vs Output Voltage
Figure 4.
I
DDO
vs Frequency
Figure 6.
I
DD
vs Temperature
Figure 8.
UVLO Rising Thresholds vs Temperature
Figure 10.
Input Thresholds vs Temperature
Figure 12.
Bootstrap Diode Forward Voltage
Note:
Unless otherwise specified, V
DD
= V
HB
= 5 V,
V
SS
= V
HS
= 0 V.
Figure 14.
LO and HO Gate Drive – High/Low Level
Output Voltage vs Temperature
Figure 3.
Peak Sink Current vs Output Voltage
Figure 5.
I
HBO
vs Frequency
Figure 7.
I
HB
vs Temperature
Figure 9.
UVLO Falling Thresholds vs Temperature
Figure 11.
Input Threshold Hysteresis vs Temperature
Figure 13.
Propagation Delay vs Temperature
Figure 15.
HB Regulation Voltage vs Temperature