Table 1. Boost Regulator Frequency Analysis

	SIMPLIFIED FORMULA	COMPREHENSIVE FORMULA(1)
MODULATOR TRANSER FUNCTION
Modulator DC gain (2)
RHP zero (2)
ESR zero
ESR pole	Not considered
Dominant load pole
Sampled gain inductor pole	Not considered	or
Quality factor	Not considered
Sub-harmonic double pole	Not considered	or
K factor	K = 1
FEEDBACK TRANSFER FUNCTION
Feedback DC gain
Mid-band Gain
Low frequency zero
High frequency pole
OPEN LOOP RESPONSE
Crossover frequency (3) (Open loop band width)		Use graphic tool
Maximum cross over frequency(4)		or , whichever is smaller

(2) With multiphase configuration, , , , and C_OUT = C_OUT of each phase x n, where n = number of phases. As is the current sense amplifier gain.

(3) Assuming , , , , and .

8.2.2.1 Timing Resistor R_T

Generally, higher frequency applications are smaller but have higher losses. Operation at 250 kHz is selected for this example as a reasonable compromise between small size and high-efficiency. The value of R_T for 250 kHz switching frequency is calculated as follows:

Equation 21.

A standard value of 36.5 kΩ is chosen for R_T.

8.2.2.2 UVLO Divider R_UV2, R_UV1

The desired startup voltage and the hysteresis are set by the voltage divider R_UV2, R_UV1. The UVLO shutdown voltage should be high enough to fully enhance the low-side N-channel MOSFET switch. For this design, the startup voltage is set to 5.5 V which is 0.2 V below 5.7 V. V_HYS is set to 3.7 V. This results 1.8 V of V_IN(SHUTDOWN). The values of R_UV2, R_UV1 are calculated as follows:

8.2.2.3 Input Inductor L_IN

The inductor ripple current is typically set between 20% and 40% of the full load current, as a good compromise between core loss and copper loss of the inductor. Higher ripple current allows a smaller inductor size, but places more of a burden on the output capacitor to smooth the ripple voltage on the output. For this example, a ripple ratio (RR) of 0.3, 30% of the input current was chosen. Knowing the switching frequency and the typical output voltage, the inductor value can be calculated as follows:

Equation 24.

The closest standard value of 10 μH was chosen for L_IN.

The saturation current rating of the inductor should be greater than the peak inductor current, which is calculated at the minimum input voltage and full load. A 2.7 V startup voltage is used to conservatively estimate the peak inductor current.

Equation 25.

8.2.2.4 Current Sense Resistor R_S

The peak input current limit threshold should be set 20~50% higher than the required peak current at low input voltage and full load, accounting for tolerances. For this example, 20% is margin is chosen.

Equation 26.

A closest standard value of 7 mΩ is selected for R_S. The maximum power loss of R_S is calculated as follows.

Equation 27.

8.2.2.5 Current Sense Filter R_CSFP, R_CSFN, C_CS

The current sense filter is optional. 100 pF for C_CS and 100 Ω for R_CSFP and R_CSFN are normal recommendations. Because CSP and CSN pins are high impedance, C_CS should be placed physically as close to the device.

Figure 40. Current Sense Filter

8.2.2.6 Slope Compensation Resistor R_SLOPE

The K value is selected to be 1 at the minimum input voltage. R_SLOPE should be selected such that the sum of sensed inductor current and slope compensation is less than COMP output high voltage.

Equation 28.

Equation 29.

A closest standard value of 95.3 kΩ is selected for R_SLOPE.

8.2.2.7 Output Capacitor C_OUT

The output capacitors smooth the output voltage ripple and provide a source of charge during transient loading conditions. Also the output capacitors reduce the output voltage overshoot when the load is suddenly disconnected.

The ripple current rating of the output capacitor should be carefully considered. In boost regulator, the output is supplied by discontinuous current and the ripple current requirement is usually high. In practice, the ripple current requirement can be dramatically reduced by placing high quality ceramic capacitors closer to the high side MOSFET switch than the bulk aluminum capacitors.

The output voltage ripple is dominated by the ESR of the output capacitors. Parallel output capacitors are a good choice to minimize effective ESR and split the output ripple current into multiple capacitors.

In this example, three 330 µF aluminum capacitors are used to share the output ripple current and source the required charge. The maximum output ripple current can be calculated at the minimum input voltage as follows:

Equation 30.

Assuming 60 mΩ of ESR per output capacitor, the output voltage ripple at the minimum input voltage is calculated as follows:

Equation 31.

In practice, four 10 µF ceramic capacitors are additionally placed before the bulk aluminum capacitors to reduce the output voltage ripple and share the output ripple current.

8.2.2.8 Input Capacitor C_IN

The input capacitors smooth the input voltage ripple. Assuming high quality ceramic capacitors are used for the input capacitors, the maximum input voltage ripple which occurs when the input voltage is half of the output voltage can be calculated as follows:

Equation 32.

The value of input capacitor is also a function of source impedance, the impedance of source power supply. More input capacitor will be required to prevent a chatter condition during power up if the impedance of source power supply is not low.

8.2.2.9 VIN Filter R_VIN, C_VIN

An R-C filter (R_VIN, C_VIN) on the VIN pin is optional. It is not required if the C_IN capacitors are high quality ceramic capacitors and placed physically close to the device. The filter helps to prevent faults caused by high frequency switching noise injection into the VIN pin. A 0.47 μF ceramic capacitor is used this example. Recommended filter values are 3 Ω for R_VIN and 0.47 µF for C_VIN . A larger filter with 2.2 µ to 4.7 µF C_VIN is recommended when the input voltage is lower than 8 V or when the required duty cycle is close to the maximum duty cycle limit.

Figure 41. VIN Filter

8.2.2.10 Bootstrap Capacitor C_BST and Boost Diode D_BST

The bootstrap capacitor between the BST and SW pins supplies the gate current to charge the high-side N-channel MOSFET gate during each turn-on cycle and also supplies recovery charge for the bootstrap diode. The peak current can be several amperes. The recommended value of the bootstrap capacitor is 0.1 μF. C_BST should be a good quality, low ESR, ceramic capacitor located at the pins of the device to minimize potentially damaging voltage transients caused by trace inductance. The minimum value for the bootstrap capacitor is calculated as follows:

Equation 33.

Where Q_G is the high-side N-channel MOSFET gate charge and ΔV_BST is the tolerable voltage droop on C_BST, which is typically less than 5% of VCC or conservatively 0.15 V . In this example, the value of the BST capacitor (C_BST) is 0.1 µF.

The voltage rating of D_BST should be greater than the peak SW node voltage plus 16 V. A low leakage diode is mandatory for bypass operation. The leakage current of D_BST should be low enough for the BST charge pump to maintain a sufficient high-side driver supply voltage at high temperature. A low leakage diode also prevents the possibility of excessive VCC voltage during shutdown, in high output voltage applications. If the diode leakage is excessive, a zener clamp or bleed resistor may be required on VCC. High-side driver supply voltage should be greater than the high-side N-channel MOSFET switch gate plateau at the minimum input voltage.

8.2.2.11 VCC Capacitor C_VCC

The primary purpose of the VCC capacitor is to supply the peak transient currents of the LO driver and bootstrap diode as well as to provide stability for the VCC regulator. The peak driver currents can be several amperes. The value of C_VCC should be at least 10 times greater than the value of C_BST, and should be a good quality, low ESR, ceramic capacitor. C_VCC should be placed close to the pins of the IC to minimize potentially damaging voltage transients caused by trace inductance. A value of 4.7 µF was selected for this design example.

8.2.2.12 Output Voltage Divider R_FB1, R_FB2

R_FB1 and R_FB2 set the output voltage level. The ratio of these resistors is calculated as follows:

Equation 34.

The ratio between R_COMP and R_FB2 determines the mid-band gain, A_{FB_MID}. A larger value for R_FB2 may require a corresponding larger value for R_COMP. R_FB2 should be large enough to keep the total divider power dissipation small. A 49.9 kΩ in series with 681 Ω was chosen for high-side feedback resistors in this example, which results in a R_FB1 value of 5.62 kΩ for 12 V output.

8.2.2.13 Soft-Start Capacitor C_SS

The soft-start time (t_SS) is the time required for the output voltage set point to reach the target voltage from the input voltage. The soft-start time is not only proportional to the soft-start capacitor, but also depends on the input voltage. With 0.1 µF for C_SS, the soft-start time is calculated as follows:

Equation 35.

8.2.2.14 Restart Capacitor C_RES

The restart capacitor determines the restart delay time t_RD and hiccup mode off time t_RES (see Figure 27). t_RD should be greater than t_SS(MAX). The minimum required value of C_RES can be calculated at the low input voltage as follows:

Equation 36.

A standard value of 0.18 µF is selected for C_RES.

8.2.2.15 Low-Side Power Switch Q_L

Breaking down the various losses is one way to compare the relative efficiencies of different N-channel MOSFET devices. Losses in the low-side N-channel MOSFET device can be separated into conduction loss and switching loss.

Low-side conduction loss is approximated calculated as follows:

Equation 37.

Where D is the duty cycle and the factor of 1.3 accounts for the increase in the N-channel MOSFET device on-resistance due to heating. Alternatively, the factor of 1.3 can be eliminated and the high temperature on-resistance of the N-channel MOSFET device can be estimated using the R_DS(ON) vs temperature curves in the N-channel MOSFET datasheet.

Switching loss occurs during the brief transition period as the low-side N-channel MOSFET device turns on and off. During the transition period both current and voltage are present in the channel of the N-channel MOSFET device. The low-side switching loss is approximated as follows:

Equation 38.

t_R and t_F are the rise and fall times of the low-side N-channel MOSFET device. The rise and fall times are usually mentioned in the N-channel MOSFET datasheet or can be empirically observed with an oscilloscope.

An additional Schottky diode can be placed in parallel with the low-side N-channel MOSFET switch, with short connections to the source and drain in order to minimize negative voltage spikes at the SW node.

8.2.2.16 High-Side Power Switch Q_H and Additional Parallel Schottky Diode

Losses in the high-side N-channel MOSFET device can be separated into conduction loss, dead-time loss and reverse recovery loss. Switching loss is calculated only for the low-side N-channel MOSFET device. Switching loss in the high-side N-channel MOSFET device is negligible because the body diode of the high-side N-channel MOSFET device turns on before and after the high-side N-channel MOSFET switches.

High-side conduction loss is approximated as follows:

Equation 39.

Dead-time loss is approximated as follows:

Equation 40.

where

• V_D is the forward voltage drop of the high-side N-channel MOSFET body diode.

Reverse recovery characteristics of the high-side N-channel MOSFET strongly influences efficiency, especially when the output voltage is high. Smaller reverse recovery charge helps to increase the efficiency while also minimizing switching noise.

Reverse recovery loss is approximated as follows:

Equation 41.

where

• Q_RR is the reverse recovery charge of the high-side N-channel MOSFET body diode.

An additional Schottky diode can be placed in parallel with the high-side switch to improve efficiency. Usually, the power rating of this parallel Schottky diode can be less than the high-side switch ratings because the diode conducts only during dead-times. The power rating of the parallel diode should be equivalent or higher than high-side switch ratings if bypass operation is required, hiccup mode operation is required or a heavy load exists before the controller begins switching.

8.2.2.17 Snubber Components

A resistor-capacitor snubber network across the high-side N-channel MOSFET device reduces ringing and spikes at the switching node. Excessive ringing and spikes can cause erratic operation and can couple noise to the output. Selecting the values for the snubber is best accomplished through empirical methods. First, make sure the lead lengths for the snubber connections are very short. Start with a resistor value between 5 and 50 Ω. Increasing the value of the snubber capacitor results in more damping, but this also increases snubber losses. Select a minimum value for the snubber capacitor that provides adequate damping of the spikes on the switch waveform at heavy load. A snubber may not be necessary with an optimized layout.

8.2.2.18 Disconnect Switch Q_D Selection

The N-channel MOSFET disconnection switch (Q_D) should be selected based on the following criteria:

• The BV_DSS rating must be greater than the maximum input voltage, plus ringing and transients.
• The safe operating area (SOA) and the thermal properties should be considered. If required, limit the rise time of the input power supply or the maximum start-up input voltage.
• Absolute maximum rating of V_GS should be greater than 18 V.
• If the minimum VIN voltage is less than 6.5 V, a logic level MOSFET should be used.
• The plateau voltage during inrush current limiting is recommended to be less than V_GS-DET. If the V_PLATEAU is greater than V_GS-DET, boost switching might start before finishing the inrush limiting.

8.2.2.19 Freewheeling Diode D_F Selection

If Q_D turns off quickly by the circuit breaker function, the inductor current continues flowing through a freewheeling diode (D_F). D_F should have enough capability to handle 150 mV/R_S of peak current during inductor current decay and the voltage rating must be greater than the maximum input voltage, plus ringing and transients. The inductor current decay time is calculated from Equation 42.

Equation 42.

8.2.2.20 Loop Compensation Components C_COMP, R_COMP, C_HF

R_COMP, C_COMP and C_HF configure the error amplifier gain and phase characteristics to produce a stable voltage loop. For a quick start, follow the 4 steps listed below:

1. Select f_CROSS

Select the cross over frequency (f_CROSS) at one fourth of the RHP zero or one tenth of the switching frequency whichever is lower.

Equation 43.
Equation 44.

A 13.4 kHz crossover frequency is selected. RHP zero at minimum input voltage should be considered if the input voltage range is wide.

2. Determine required R_COMP

Knowing f_CROSS, R_COMP is calculated as follows:

Equation 45.

A standard value of 200 kΩ is selected for R_COMP

3. Determine C_COMP to cancel load pole. Place the error amplifier zero at twice the load pole frequency. Knowing R_COMP, C_COMP is calculated as follows:
Equation 46.

A standard value of 8.2 nF is selected for C_COMP

4. Determine C_HF to cancel the ESR zero.

Knowing R_COMP, R_ESR and C_COMP, C_HF is calculated as follows:

Equation 47.

A standard value of 100 pF is selected for C_HF