JAJSV63A August 2024 – August 2024 LM5137-Q1
ADVANCE INFORMATION
A synchronous buck regulator implemented with a low-side synchronous MOSFET rather than a diode has the capability to sink negative current from the output during light load, output overvoltage, and prebias startup conditions. The LM5137-Q1 provides a diode emulation feature that can be enabled to prevent reverse (drain-to-source) current flow in the low-side MOSFET. When configured for diode emulation mode, the low-side MOSFET is switched off when reverse current flow is detected by sensing the SW voltage using a zero-cross comparator. The benefit of this configuration is lower power loss during light-load conditions. The disadvantage of diode emulation mode is slower light-load transient response.
Use the PFM/SYNC pin to configure diode emulation. To enable diode emulation and thus achieve high efficiency at light loads, connect PFM/SYNC to VDDA. If FPWM with continuous conduction mode (CCM) operation is preferred, tie PFM/SYNC to AGND. Note that diode emulation is automatically engaged to prevent reverse current flow during a prebiased startup. A gradual change from DCM to CCM operation provides monotonic startup performance.
To synchronize the LM5137-Q1 to an external clock source, apply a logic-level signal to the PFM/SYNC pin. The LM5137-Q1 can be synchronized to ±20% of the programmed free-running frequency up to a maximum of 2.5MHz. If there is an RT resistor and a synchronization clock signal, the LM5137-Q1 ignores the RT resistor and synchronizes to the external clock. However, under low VIN conditions when the minimum off-time is reached, the synchronization signal is ignored, allowing the switching frequency to reduce to maintain output voltage regulation.