Table 3. Design Requirements

8.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM5141 device with the WEBENCH® Power Designer.

1. Start by entering the input voltage (V_IN), output voltage (V_OUT), and output current (I_OUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

8.2.6.1 EMI Filter Design

EMI Filter Design Steps:

• Calculate the required attenuation
• Capacitor C_IN represents the existing capacitor at the input of the switching converter (10 µF was used for this application)
• Inductor LF is usually selected between 1 μH and 10 μH (1.8 µH was used for this application), but can be smaller to reduce losses in a high current design
• Calculate capacitor C_F

Figure 29. Input EMI Filter

By calculating the first harmonic current from the Fourier series of the input current waveform and multiplying it by the input impedance (the impedance is defined by the existing input capacitor C_IN), a formula can be derived to obtain the required attenuation:

Equation 37.

Equation 38.

V_MAX is the allowed dBμV noise level for the particular EMI standard. C_IN is the existing input capacitors of the Buck converter, for this application 10 µF was selected. D_MAX is the maximum duty cycle, Ipk is the inductor current, the current at the input can be modeled as a square wave, F_SW is the switching frequency.

Equation 39.

Equation 40.

For this application, C_F was chosen to be 1 μF. Adding an input filter to a switching regulator modifies the control-to output transfer function. The output impedance of the filter must be sufficiently small such that the input filter does not significantly affect the loop gain of the buck converter. The impedance of the filter peaks at the filter resonant frequency.

Equation 41.

Equation 42.

Referring to Figure 29, the purpose of R_D is to reduce the peak output impedance of the filter at the cutoff frequency. The capacitor C_D blocks the dc component of the input voltage, and avoids excessive power dissipation on R_D. The capacitor C_D should have lower impedance than R_D at the resonant frequency, with a capacitance value greater than 5 times the filter capacitor C_IN. This will prevent it from interfering with the cutoff frequency of the main filter. Added damping is needed when the output impedance is high at the resonant frequency (Q) of filter formed by C_IN and L_F is too high):

An electrolytic cap C_D can be used as damping device, with value:

Equation 43.

For this design C_D = 47 µF was selected

Equation 44.

8.2.6.2 MOSFET Selection

The LM5141 gate drivers are powered by the internal 5-V VCC bias regulator. To reduce power dissipation in the controller and improve efficiency, the VCCX pin should be connected to the 5-V output or an external 5 V bias supply. The MOSFETs used with the LM5141 require a logic-level gate threshold with R_DS(ON) specified with V_GS = 4.5 V or lower.

The MOSFETs must be chosen with a V_DS rating to withstand the maximum V_IN voltage plus supply voltage transients and spikes (ringing). In addition, the N-channel MOSFETs must be capable of delivering the load current plus peak ripple current during switching.

The high-side MOSFET losses are associated with the R_DS(ON) of the MOSFET and the switching losses.

Equation 45.

Equation 46.

where

• tr = ts = 17 ns

The losses in the low side MOSFET include: R_DS(ON) losses, dead time losses, and losses in the MOSFETs internal body diode. The body diode conducts the inductor current during the dead time before the rising edge of the switch node; minority carriers are injected into and stored in the diode PN junction when forward biased. As the high side FET starts to turn-on, a negative current must first flow through the diode to remove the stored charge before the diode can block a reverse voltage. During this time, the high side drain-source voltage remains at V_IN until all the diode minority carriers are removed. Then, the diode begins to block negative voltage and the reverse current continues to flow to charge the body diode depletion capacitance. The total charge involved in this period is called reverse-recovery charge Qrr.

Equation 47.

Equation 48.

where

• t_dr and t_df are the switch node voltage rise and fall times (20 ns)
• V_D(FET) is the forward voltage drop across the low-side MOSFET internal body diode (0.8 V)
• D_Qrr is the internal body diodes reverse recovery charge (105 nC)
• R_DS(ON) is the on resistance of the MOSFETs (26 mΩ at T_J = 125ºC)

Table 4 provides parameters for several MOSFETs that have tested in the LM5141 evaluation module.

8.2.6.3 Driver Slew Rate Control

Figure 30 shows the high current driver outputs with independent source and current sink pins for slew rate control. Slew rate control enables the user to adjust the switch node rise and fall times which can reduce the conducted EMI in the FM radio band (30 MHz to 108 MHz). Figure 31 shows the measured results without slew rate control.

The conducted EMI results with slew rate control are shown in Figure 32, a 10-dB reduction in conduction emissions in the FM band is attained by using slew rate control. This can help reduce the size and cost of the EMI filters.

Figure 30. Drivers with Slew Rate Control

Figure 31. Conducted EMI Measurement, Without Slew Rate Control

Figure 32. Conducted EMI Measurements, With Slew Rate Control

8.2.6.4 Frequency Dithering

Figure 33 shows the conducted emission test run on the LM5141EVM, without the Dither feature enabled. The first harmonic (peak measurement) is 48 dBµV, Figure 34 shows the conducted emissions test results with the Dither feature enabled. With the Dither featured enabled, the first harmonic (peak measurement) was lowered to 40 dBµV, an 8 dB reduction.

Figure 33. Measured Conducted EMI, Without Dither

Figure 34. Measured Conducted EMI, With Dither

8.2.7.1 Feedback Compensator

A type II compensator using an transconductance error amplifier (EA), Gm, is shown in Figure 35. The dominant pole of the EA open-loop gain is set by the EA output resistance, R_AMP, and effective bandwidth-limiting capacitance, C_O, as follows:

Equation 52.

The EA high frequency pole is neglected in the above expression. The compensator transfer function from output voltage to COMP, including the gain contribution from the feedback resistor divider network is:

Equation 53.

Equation 54.

where

Equation 55.

Which simplifies to:

Equation 56.

Figure 35. Transconductance Amplifier

Equation 57.

Equation 58.

Equation 59.

Typically R_COMP << R_AMP and C_COMP >> (C_HF + C_O) so the approximations are valid.

where

V_REF is the feedback voltage reference (1.2 V)

G_m is the error amplifier gain transconductance (1200 µS)

R_AMP is the error amplifier output impedance (2.5 MΩ)

The error amplifier compensation components create a pole at the origin, a zero, and a high frequency pole.

The procedure for choosing compensation components for a stable closed loop is:

• Select the desired open loop gain crossover frequency (fc); for this application 30 kHz was chosen
• Calculate the R_COMP resistor for the gain crossover frequency at 30 kHz
Equation 60.
Equation 61.

The value selected for R_COMP is 22.6 kΩ.

where

R_DCR = 0.0081 Ω

• Calculate the C_COMP capacitor value to create a zero that cancels the pole ω_p ( ω_p = 1/R_LOAD × C_OUT)
Equation 62.
Equation 63.

The value selected for C_COMP is 10nF.