JAJSDX2C September   2017  – October 2021 LM5150-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Enable (EN Pin)
      2. 8.3.2  High Voltage VCC Regulator (PVCC, AVCC Pin)
      3. 8.3.3  Power-On Voltage Selection (VSET Pin)
      4. 8.3.4  Switching Frequency (RT Pin)
      5. 8.3.5  Clock Synchronization (SYNC Pin in SS Configuration)
      6. 8.3.6  Current Sense, Slope Compensation, and PWM (CS Pin)
      7. 8.3.7  Current Limit (CS Pin)
      8. 8.3.8  Feedback and Error Amplifier (COMP Pin)
      9. 8.3.9  Automatic Wake-Up and Standby
      10. 8.3.10 Boost Status Indicator (STATUS Pin)
      11. 8.3.11 Maximum Duty Cycle Limit, Minimum Input Supply Voltage
      12. 8.3.12 MOSFET Driver (LO Pin)
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Wake-Up Mode
        1. 8.4.3.1 Start-Stop Configuration (SS Configuration)
        2. 8.4.3.2 Emergency-Call Configuration (EC Configuration)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Bypass Switch / Disconnection Switch Control
      2. 9.1.2 Loop Response
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  RSET Resistor
        3. 9.2.2.3  RT Resistor
        4. 9.2.2.4  Inductor Selection (LM)
        5. 9.2.2.5  Current Sense (RS)
        6. 9.2.2.6  Slope Compensation Ramp (RSL)
        7. 9.2.2.7  Output Capacitor (COUT)
        8. 9.2.2.8  Loop Compensation Component Selection and Maximum ESR
        9. 9.2.2.9  PVCC Capacitor, AVCC Capacitor, and AVCC Resistor
        10. 9.2.2.10 VOUT Filter (CVOUT, RVOUT)
        11. 9.2.2.11 Input Capacitor
        12. 9.2.2.12 MOSFET Selection
        13. 9.2.2.13 Diode Selection
        14. 9.2.2.14 Efficiency Estimation
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Lower Standby Threshold in SS Configuration
      2. 9.3.2 Dithering Using Dither Enabled Device
      3. 9.3.3 Clock Synchronization With LM5140
      4. 9.3.4 Dynamic Frequency Change
      5. 9.3.5 Dithering Using an External Clock
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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発注情報

7.5 Electrical Characteristics

Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over TJ = –40°C to 125°C. Unless otherwise stated, VVOUT = 6.8 V, RT = 9.09 kΩ
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENT
ISHUTDOWN(VOUT)VOUT shutdown currentVVOUT = 12 V, VEN = 0 V512µA
ISTANDBY(VOUT)VOUT standby current (PVCC in regulation, STATUS is low)VVOUT = 12 V, VEN = 3.3 V, RSET = 90.9 kΩ1525µA
IWAKEUP(VOUT)VOUT operating current (exclude current into RT resistor)VVOUT = 10.5 V, VEN = 2.5 V, non-switching, RT = 9.09 kΩ1.22.0mA
ISHUTDOWN(VIN)VIN shutdown currentVVIN = 12 V, VEN = 0 V0.10.5µA
ISTANDBY(VIN)VIN standby currentVVIN = 12 V, VEN = 3.3 V, RSET = 29.4 kΩ0.10.5µA
IWAKEUP(VIN)VIN operating currentVVIN = 10.5 V, VEN = 2.5 V, non-switching, RT = 9.09 kΩ3045µA
VCC REGULATOR
VVCC-REG-NOLOADPVCC regulationVVOUT = 6.0 V, No load, wake-up mode4.7555.25V
VVCC-REG-FULLLOADPVCC regulationVVOUT = 5.0 V, IPVCC = 70 mA4.54.8V
VVCC-UVLO-RISINGAVCC UVLO thresholdAVCC rising4.14.34.5V
VVCC-UVLO-FALLINGAVCC UVLO thresholdAVCC falling3.94.14.3V
VVCC-UVLO-HYSAVCC UVLO hysteresis0.2V
IVCC-CLPVCC sourcing current limitVPVCC = 0 V, wake-up mode75mA
ENABLE
VEN-RISINGEnable thresholdEN rising1.72V
VEN-FALLINGEnable thresholdEN falling11.3V
IENEN bias currentVEN = 42 V100nA
6.8-V SETTING
VVOUT-REGVOUT regulation targetRSET = 29.4 kΩ or 90.9 kΩ6.666.806.98V
VVOUT-WAKEUPVOUT wake-up threshold
(VVOUT-REG + 3%)		RSET = 29.4 kΩ or 90.9 kΩ, VOUT falling6.837.007.14V
VVOUT-STANDBY1VOUT standby threshold
(VVOUT-REG + 6%, EC config)		RSET = 90.9 kΩ, VOUT rising7.027.217.35V
VVOUT-STATUS-OFFVOUT status off threshold
(VVOUT-REG + 12%, EC config)		RSET = 90.9 kΩ, VOUT rising7.427.627.81V
VVOUT-STANDBY2VOUT standby threshold
(VVOUT-REG + 24%, SS config)		RSET = 29.4 kΩ, VOUT rising8.228.438.60V
VVIN-STANDBYVIN standby threshold
(VVOUT-WAKEUP + 1.0 V, SS config)		RSET = 29.4 kΩ, VIN rising7.828.008.19V
7.5-V SETTING
VVOUT-REGVOUT regulation targetRSET = 19.1 kΩ or 71.5 kΩ7.377.507.67V
VVOUT-WAKEUPVOUT wake-up threshold
(VVOUT-REG + 3%)		RSET = 19.1 kΩ or 71.5 kΩ, VOUT falling7.527.737.88V
VVOUT-STANDBY1VOUT standby threshold
(VVOUT-REG + 6%, EC config)		RSET = 71.5 kΩ, VOUT rising7.747.958.11V
VVOUT-STATUS-OFFVOUT status off threshold
(VVOUT-REG + 12%, EC config)		RSET = 71.5 kΩ, VOUT rising8.198.408.61V
VVOUT-STANDBY2VOUT standby threshold
(VVOUT-REG + 24%, SS config)		RSET = 19.1 kΩ, VOUT rising9.079.309.46V
VVIN-STANDBYVIN standby threshold
(VVOUT-WAKEUP + 1.0 V, SS config)		RSET = 19.1 kΩ, VIN rising8.508.738.93V
8.5-V SETTING
VVOUT-REGVOUT regulation targetRSET = 9.53 kΩ or 54.9 kΩ8.378.508.69V
VVOUT-WAKEUPVOUT wake-up threshold
(VVOUT-REG + 3%)		RSET = 9.53 kΩ or 54.9 kΩ, VOUT falling8.528.768.93V
VVOUT-STANDBY1VOUT standby threshold
(VVOUT-REG + 6%, EC config)		RSET = 54.9 kΩ, VOUT rising8.789.019.19V
VVOUT-STATUS-OFFVOUT status off threshold
(VVOUT-REG + 12%, EC config)		RSET = 54.9 kΩ, VOUT rising9.289.529.75V
VVOUT-STANDBY2VOUT standby threshold
(VVOUT-REG + 24%, SS config)		RSET = 9.53 kΩ, VOUT rising10.2910.5410.72V
VVIN-STANDBYVIN standby threshold
(VVOUT-WAKEUP + 1.0 V, SS config)		RSET = 9.53 kΩ, VIN rising9.509.769.98V
10.5-V SETTING
VVOUT-REGVOUT regulation targetRSET = GND or 41.2 kΩ10.3110.5010.75V
VVOUT-WAKEUPVOUT wake-up threshold
(VVOUT-REG + 3%)		RSET = GND or 41.2 kΩ, VOUT falling10.5310.8211.02V
VVOUT-STANDBY1VOUT standby threshold
(VVOUT-REG + 6%, EC config)		RSET = 41.2 kΩ, VOUT rising10.8411.1311.33V
VVOUT-STATUS-OFFVOUT status off threshold
(VVOUT-REG + 12%, EC config)		RSET = 41.2 kΩ, VOUT rising11.4611.7612.04V
VVOUT-STANDBY2VOUT standby threshold
(VVOUT-REG + 24%, SS config)		RSET = GND, VOUT rising12.7013.0213.24V
VVIN-STANDBYVIN standby threshold
(VVOUT-WAKEUP + 1.0 V, SS config)		RSET = GND, VIN rising11.4711.8212.11V
RT
VRT-REGRT regulation voltage1.2V
CLOCK SYNCHRONIZATION
VSYNC-RISINGSYNC rising threshold2.02.4V
VSYNC-FALLINGSYNC falling threshold0.41.5V
PULSE WIDTH MODULATION AND OSCILLATOR
FSW1Switching frequencyRT = 93.1 kΩ204239270kHz
FSW2Switching frequencyRT = 9.09 kΩ210023002500kHz
FSW3Switching frequencyRT = 9.09 kΩ,
FSYNC = 2.0 MHz		2000kHz
TON-MINForced minimum on timeSS config, VCOMP = 0 V305070ns
DMINMinimum duty cycle limit (EC config)RT = 9.09 kΩ, VVIN = 1.5 V, VVOUT = 6.8 V, VCOMP = 0 V60%
RT = 93.1 kΩ, VVIN = 8.4 V, VVOUT = 10.5 V, VCOMP = 0 V16%
DMAXMaximum duty cycle limitSS config, RT = 9.09 kΩ83%87%91.5%
EC config, RT = 93.1 kΩ83%87%91.5%
CURRENT SENSE
VCSTHCurrent limit threshold (CS-AGND)(1)VVIN = 5.1 V, VVOUT = 6.8 V at 25% DC102120138mV
VVIN = 3.4 V, VVOUT = 6.8 V at 50% DC102120138mV
VVIN = 1.7 V, VVOUT = 6.8 V at 75% DC102120138mV
ERROR AMPLIFIER
GmTransconductance2mA/V
COMP souring currentVCOMP = 0 V312µA
COMP sinking currentVCOMP = 1.5 V120µA
COMP clamp voltage2.42.6V
COMP to PWM offset0.3V
STATUS
Low-state voltage drop1-mA sinking0.1V
STATUS rise to LO delay5-kΩ pullup to 5 V456µs
MOSFET DRIVER
High-state voltage drop50-mA sinking0.075V
Low-state voltage drop50-mA sourcing0.055V
THERMAL SHUTDOWN (TSD)
Thermal shutdown thresholdTemperature rising175°C
Thermal shutdown hysteresis15°C
(1) VCL at the current limit comparator input is 10 x VCSTH