JAJSEY4C March   2018  – October 2021 LM51501-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Enable (EN Pin)
      2. 8.3.2  High Voltage VCC Regulator (PVCC, AVCC Pin)
      3. 8.3.3  Power-On Voltage Selection (VSET Pin)
      4. 8.3.4  Switching Frequency (RT Pin)
      5. 8.3.5  Clock Synchronization (SYNC Pin in SS Configuration)
      6. 8.3.6  Current Sense, Slope Compensation, and PWM (CS Pin)
      7. 8.3.7  Current Limit (CS Pin)
      8. 8.3.8  Feedback and Error Amplifier (COMP Pin)
      9. 8.3.9  Automatic Wake-Up and Standby
      10. 8.3.10 Boost Status Indicator (STATUS Pin)
      11. 8.3.11 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
      12. 8.3.12 MOSFET Driver (LO Pin)
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Wake-Up Mode
        1. 8.4.3.1 Start-Stop Configuration (SS Configuration)
        2. 8.4.3.2 Emergency-Call Configuration (EC Configuration)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Bypass Switch / Disconnection Switch Control
      2. 9.1.2 Loop Response
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  RSET Resistor
        3. 9.2.2.3  RT Resistor
        4. 9.2.2.4  Inductor Selection (LM)
        5. 9.2.2.5  Current Sense (RS)
        6. 9.2.2.6  Slope Compensation Ramp (RSL)
        7. 9.2.2.7  Output Capacitor (COUT)
        8. 9.2.2.8  Loop Compensation Component Selection and Maximum ESR
        9. 9.2.2.9  PVCC Capacitor, AVCC Capacitor, and AVCC Resistor
        10. 9.2.2.10 VOUT Filter (CVOUT, RVOUT)
        11. 9.2.2.11 Input Capacitor
        12. 9.2.2.12 MOSFET Selection
        13. 9.2.2.13 Diode Selection
        14. 9.2.2.14 Efficiency Estimation
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Lower Standby Threshold in SS Configuration
      2. 9.3.2 Dithering Using Dither Enabled Device
      3. 9.3.3 Clock Synchronization With LM5140
      4. 9.3.4 Dynamic Frequency Change
      5. 9.3.5 Dithering Using an External Clock
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

9.2.2.14 Efficiency Estimation

The total loss of the boost converter (PTOTAL) can be expressed as the sum of the losses in the LM51501-Q1 (PIC), MOSFET power losses (PQ), diode power losses (PD), inductor power losses (PL), and the loss in the sense resistor (PRS).

Equation 41. GUID-23E791B3-71F1-446B-972D-1B7667A0B1A9-low.gif

PIC can be separated into gate driving loss (PG) and the losses caused by quiescent current (PIQ) in Equation 42.

Equation 42. GUID-CFC5E57C-7A75-4C4E-AFC3-C83244935307-low.gif

Each power loss is approximately calculated in Equation 43 and Equation 44:

Equation 43. GUID-FAF3B1E2-DFC4-438B-A834-1D2EB7DF3AF9-low.gif
Equation 44. GUID-29B3F585-1442-43A8-B119-B3A1D57210E3-low.gif

IVIN and IVOUT values in each mode can be found in the supply current section of Section 7.5.

PQ can be separated into switching loss (PQ(SW)) and conduction loss (PQ(COND)) in Equation 45.

Equation 45. GUID-263BE9AC-BDC9-4229-8E61-0C49740A4378-low.gif

Each power loss is approximately calculated using Equation 46:

Equation 46. GUID-117076F3-EA85-48D4-858B-174553F7EC50-low.gif

tR and tF are the rise and fall times of the low-side N-channel MOSFET device. ISUPPLY is the input supply current of the boost converter.

Equation 47. GUID-444B11A3-D344-4E99-B299-353B6F2E2C98-low.gif

RDS(ON) is the on-resistance of the MOSFET and is specified in the MOSFET data sheet. Consider the RDS(ON) increase due to self-heating.

PD can be separated into diode conduction loss (PVF) and reverse recovery loss (PRR) in Equation 48.

Equation 48. GUID-72FAB8F9-5EFC-4CC3-BCE4-FAE3D912709F-low.gif

Each power loss is approximately calculated using Equation 49 and Equation 50:

Equation 49. GUID-C790B063-9478-42DF-948F-A352D83649DE-low.gif
Equation 50. GUID-990765FB-66B6-403A-9264-74AE210E2DBC-low.gif

QRR is the reverse recovery charge of the diode and is specified in the diode data sheet. Remember that reverse recovery characteristics of the diode strongly affect efficiency, especially when the output voltage is high.

PL is the sum of DCR loss (PDCR) and AC core loss (PAC) in Equation 51. DCR is the DC resistance of inductor and is mentioned in the inductor data sheet.

Equation 51. GUID-EE8FA34E-8E5B-437D-BDD7-9E317477B01A-low.gif

Each power loss is approximately calculated by Equation 52, Equation 53, and Equation 54:

Equation 52. GUID-A89DB8D9-5C4E-41C4-BEF2-92765014F4F0-low.gif
Equation 53. GUID-7F971EC1-D61E-418F-9330-4B008657DB35-low.gif

where

  • ∆I is the peak-to-peak inductor current ripple.
  • K, α, and β are core dependent factors that can be provided by the inductor manufacturer.
Equation 54. GUID-C5967F64-156D-4433-9778-F14C493AD705-low.gif

PRS is calculated as Equation 55:

Equation 55. GUID-B05A937C-F314-484F-B8A1-FEB018DC15E1-low.gif

Efficiency of the power converter can be estimated using Equation 56:

Equation 56. GUID-FB154740-0CE3-436B-8FB6-85A9C7941B8C-low.gif