JAJSIG6B January 2020 – January 2021 LM5156-Q1 , LM51561-Q1
PRODUCTION DATA
- 1 特長
- 2 アプリケーション
- 3 概要
- 4 Revision History
- 5 概要 (続き)
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Line Undervoltage Lockout (UVLO/SYNC/EN Pin)
- 9.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)
- 9.3.3 Soft Start (SS Pin)
- 9.3.4 Switching Frequency (RT Pin)
- 9.3.5 Dual Random Spread Spectrum (DRSS)
- 9.3.6 Clock Synchronization (UVLO/SYNC/EN Pin)
- 9.3.7 Current Sense and Slope Compensation (CS Pin)
- 9.3.8 Current Limit and Minimum On-time (CS Pin)
- 9.3.9 Feedback and Error Amplifier (FB, COMP Pin)
- 9.3.10 Power-Good Indicator (PGOOD pin)
- 9.3.11 Hiccup Mode Overload Protection (LM51561-Q1 Only)
- 9.3.12 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
- 9.3.13 MOSFET Driver (GATE Pin)
- 9.3.14 Overvoltage Protection (OVP)
- 9.3.15 Thermal Shutdown (TSD)
- 9.4 Device Functional Modes
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
- DSS|12
サーマルパッド・メカニカル・データ
- DSS|12
発注情報
8.6 Typical Characteristics
Figure 8-1 Frequency vs RT Resistance
Figure 8-3 VVCC vs IVCC
Figure 8-5 Peak Current Limit vs Duty Cycle
Figure 8-7 FB Reference vs Temperature
Figure 8-9 IOPERATING(BIAS) Including RT Current vs VBIAS
Figure 8-11 ISHUTDOWN vs Temperature
Figure 8-13 ISS vs Temperature
Figure 8-15 UVLO Threshold vs Temperature
Figure 8-2 Frequency vs Temperature
Figure 8-4 VVCC vs VBIAS (No Load)
Figure 8-6 Current Limit Threshold vs Temperature
Figure 8-8 EN Threshold vs Temperature
Figure 8-10 ISHUTDOWN(BIAS) vs VBIAS
Figure 8-12 tON(MIN) vs Frequency
Figure 8-14 Peak Driver Current vs VCC
Figure 8-16 Maximum Duty Cycle vs Frequency