JAJSG75B September   2018  – April 2024 LM5164-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Control Architecture
      2. 6.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 6.3.3  Regulation Comparator
      4. 6.3.4  Internal Soft Start
      5. 6.3.5  On-Time Generator
      6. 6.3.6  Current Limit
      7. 6.3.7  N-Channel Buck Switch and Driver
      8. 6.3.8  Synchronous Rectifier
      9. 6.3.9  Enable/Undervoltage Lockout (EN/UVLO)
      10. 6.3.10 Power Good (PGOOD)
      11. 6.3.11 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Active Mode
      3. 6.4.3 Sleep Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Switching Frequency (RRON)
        3. 7.2.2.3 Buck Inductor (LO)
        4. 7.2.2.4 Output Capacitor (COUT)
        5. 7.2.2.5 Input Capacitor (CIN)
        6. 7.2.2.6 Type-3 Ripple Network
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Compact PCB Layout for EMI Reduction
        2. 7.4.1.2 Feedback Resistors
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 サード・パーティ製品に関する免責事項
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.3 Regulation Comparator

The feedback voltage at FB is compared to an internal 1.2-V reference. The LM5164-Q1 voltage regulation loop regulates the output voltage by maintaining the FB voltage equal to the internal reference voltage, VREF. A resistor divider programs the ratio from output voltage VOUT to FB.

For a target VOUT setpoint, use Equation 10 to calculate RFB2 based on the selected RFB1.

Equation 10. LM5164-Q1

TI recommends selecting RFB1 in the range of 100 kΩ to 1 MΩ for most applications. A larger RFB1 consumes less DC current, which is mandatory if light-load efficiency is critical. RFB1 larger than 1 MΩ is not recommended as the feedback path becomes more susceptible to noise. It is important to route the feedback trace away from the noisy area of the PCB and keep the feedback resistors close to the FB pin.