JAJSCV6B December   2016  – June 2017 LM5166

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Integrated Power MOSFETs
      2. 7.3.2  Selectable PFM or COT Mode Converter Operation
        1. 7.3.2.1 PFM Mode Operation
        2. 7.3.2.2 COT Mode Operation
          1. 7.3.2.2.1 Ripple Generation Methods
          2. 7.3.2.2.2 COT Mode Light-Load Operation
      3. 7.3.3  Low Dropout Operation and 100% Duty Cycle Mode
      4. 7.3.4  Adjustable Output Voltage (FB)
      5. 7.3.5  Adjustable Current Limit
      6. 7.3.6  Precision Enable (EN) and Hysteresis (HYS)
      7. 7.3.7  Power Good (PGOOD)
      8. 7.3.8  Configurable Soft Start (SS)
      9. 7.3.9  Short-Circuit Operation
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode - COT
      4. 7.4.4 Sleep Mode - COT
      5. 7.4.5 Active Mode - PFM
      6. 7.4.6 Sleep Mode - PFM
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Wide VIN, Low IQ, High-Efficiency COT Converter Rated at 5 V, 500 mA
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Feedback Resistors - RFB1, RFB2
          3. 8.2.1.2.3 Switching Frequency - RT
          4. 8.2.1.2.4 Filter Inductance - LF
          5. 8.2.1.2.5 Output Capacitors - COUT
          6. 8.2.1.2.6 Ripple Generation Network - RESR, CFF
          7. 8.2.1.2.7 Input Capacitor - CIN
          8. 8.2.1.2.8 Soft-Start Capacitor - CSS
          9. 8.2.1.2.9 Application Curves
      2. 8.2.2 Design 2: Wide VIN, Low IQ COT Converter Rated at 3.3 V, 500 mA
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Feedback Resistors - RFB1, RFB2
          2. 8.2.2.2.2 Switching Frequency - RT
          3. 8.2.2.2.3 Filter Inductance - LF
          4. 8.2.2.2.4 Output Capacitors - COUT
          5. 8.2.2.2.5 Ripple Generation Network - RESR
          6. 8.2.2.2.6 Input Capacitor - CIN
          7. 8.2.2.2.7 Soft-Start Capacitor - CSS
          8. 8.2.2.2.8 Application Curves
      3. 8.2.3 Design 3: High-Density PFM Converter Rated at 3.3 V, 0.3 A
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Peak Current Limit Setting - RILIM
          2. 8.2.3.2.2 Switching Frequency - LF
          3. 8.2.3.2.3 Output Capacitors - COUT
          4. 8.2.3.2.4 Input Capacitor - CIN
          5. 8.2.3.2.5 Application Curves
      4. 8.2.4 Design 4: Wide VIN, Low IQ PFM Converter Rated at 5 V, 500 mA
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 Feedback Resistors - RFB1, RFB2
          2. 8.2.4.2.2 Peak Current Limit Setting - RILIM
          3. 8.2.4.2.3 Switching Frequency - LF
          4. 8.2.4.2.4 Output Capacitors - COUT
          5. 8.2.4.2.5 Input Capacitor - CIN
        3. 8.2.4.3 Application Curves
      5. 8.2.5 Design 5: 12-V, 300-mA COT Converter Operating From 24-V or 48-V Input
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
          1. 8.2.5.2.1 Peak Current Limit Setting - RILIM
          2. 8.2.5.2.2 Switching Frequency - RRT
          3. 8.2.5.2.3 Inductor - LF
          4. 8.2.5.2.4 Input and Output Capacitors - CIN, COUT
          5. 8.2.5.2.5 Feedback Resistors - RFB1, RFB2
          6. 8.2.5.2.6 Ripple Generation Network - RA, CA, CB
          7. 8.2.5.2.7 Undervoltage Lockout Setpoint - RUV1, RUV2, RHYS
          8. 8.2.5.2.8 Soft Start - CSS
        3. 8.2.5.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact PCB Layout for EMI Reduction
      2. 10.1.2 Feedback Resistors
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
      3. 11.1.3 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

LM5166X and LM5166Y Fixed Output DRC Package
10-Pin VSON
Top View
LM5166 VSON_pinout_snvsa67_fixed_version.gif
LM5166 Adjustable Output DRC Package
10-Pin VSON
Top View
LM5166 VSON_pinout_snvsa67_adj_version.gif

Pin Functions

PIN I/O(1) DESCRIPTION
NO. NAME
1 SW P Switching node that is internally connected to the drain of the PFET buck switch (high side) and the drain of the NFET synchronous rectifier (low side). Connect to the buck inductor.
2 VIN P Regulator supply input pin to high-side power MOSFET and internal bias rail LDO. Connect to input supply and input filter capacitor CIN. The path from the VIN pin to the input capacitor must be as short as possible.
3 ILIM I Programming pin for current limit. Connecting the appropriate resistance from the ILIM pin to GND selects one of the three current limit options. The available current limit options are detailed in Table 3.
4 SS I Programming pin for the soft-start delay. If a 100-kΩ resistor is connected from the SS pin to GND, the internal soft-start circuit is disabled and the FB comparator reference steps immediately from zero to full value when the regulator is enabled by the EN input. If the SS pin is left open, the internal soft-start circuit ramps the FB reference from zero to full value in 900 µs. If a capacitor is connected from the SS pin to GND, the soft-start time can be set longer than 900 µs.
5 RT I Mode select and on-time programming pin for Constant On-Time control. Connect a resistor from the RT pin to GND to program the on-time and hence switching frequency. Short RT to GND to select PFM (pulse frequency modulation) operation.
6 PGOOD O Power Good output flag pin. PGOOD is connected to the drain of an NFET that holds the pin low when either FB or VOUT is not in regulation. Use a 10-kΩ to 100-kΩ pullup resistor to system voltage rail or VOUT (no higher than 12 V).
7 EN I Input pin of the precision enable / UVLO comparator. The regulator is enabled when the EN pin voltage is greater than 1.22 V.
8 VOUT or FB I Feedback input to the voltage regulation loop for the LM5166 Adjustable Output version, or a VOUT pin connects the internal feedback resistor divider to the regulator output voltage for the fixed 3.3-V or 5-V options. The FB pin connects the internal feedback comparator to an external resistor divider for the adjustable voltage option, and the reference for the FB pin comparator is 1.223 V.
9 HYS O Drain of internal NFET that is turned off when the EN input is greater than the EN pin threshold. External resistors from HYS to EN and GND program the input UVLO threshold and hysteresis.
10 GND G Regulator ground return.
— PAD P Connect to GND pin and system ground on PCB. Path to CIN must be as short as possible.
(1) P = Power, G = Ground, I = Input, O = Output.