SNVSCL2
December 2024
LM51770
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Handling Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Parameter Measurement Information
7.1
Gate Driver Rise Time and Fall Time
7.2
Gate Driver Dead (Transition) Time
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power-On Reset (POR System)
8.3.2
Buck-Boost Control Scheme
8.3.2.1
Boost Mode
8.3.2.2
Buck Mode
8.3.2.3
Buck-Boost Mode
8.3.3
Power Save Mode
8.3.4
Supply Voltage Selection – VMAX Switch
8.3.5
Enable and Undervoltage Lockout
8.3.6
Oscillator Frequency Selection
8.3.7
Frequency Synchronization
8.3.8
Voltage Regulation Loop
8.3.9
Output Voltage Tracking
8.3.10
Slope Compensation
8.3.11
Configurable Soft Start
8.3.12
Peak Current Sensor
8.3.13
Current Monitoring and Current Limit Control Loop
8.3.14
Short Circuit - Hiccup Protection
8.3.15
nFLT Pin and Protections
8.3.16
Device Configuration Pin
8.3.17
Dual Random Spread Spectrum – DRSS
8.3.18
Gate Driver
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Detailed Design Procedure
9.2.1.1
Custom Design with WEBENCH Tools
9.2.1.2
Frequency
9.2.1.3
Feedback Divider
9.2.1.4
Inductor and Current Sense Resistor Selection
9.2.1.5
Slope Compensation
9.2.1.6
Output Capacitor
9.2.1.7
Input Capacitor
9.2.1.8
UVLO Divider
9.2.1.9
Soft-Start Capacitor
9.2.1.10
MOSFETs QH1 and QL1
9.2.1.11
MOSFETs QH2 and QL2
9.2.1.12
Frequency Compensation
9.2.1.13
External Component Selection
9.2.2
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Power Stage Layout
11.1.2
Gate Driver Layout
11.1.3
Controller Layout
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.1.2
Development Support
12.1.2.1
Custom Design with WEBENCH Tools
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Revision History
14
Mechanical, Packaging, and Orderable Information
80
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DCP|38
MPDS520B
サーマルパッド・メカニカル・データ
DCP|38
PPTD170A
発注情報
snvscl2_oa
1
Features
Wide input range from 3.5V to 78V (85V absolute maximum)
Minimum 2.8V when V
(BIAS)
> 3.5V
Output voltage from 3.3V to
78V
Low shutdown I
Q
of 3μA
Low operating I
Q
of 60μA
3% reverse current limit accuracy for precise charging currents
Average input and output current monitor or limiter
Dynamic output voltage tracking for PWM or analog input signals
Power save mode (PSM) selectable for high light load efficiency
Two integrated high-voltage supply LDOs with automatic selection
Fixed frequency across all operating modes (boost, buck-boost, buck)
Forced PWM mode selectable
Switching up to 1.8MHz for small solution and component size
External clock synchronization
Spread spectrum operation selectable
Adjustable undervoltage protection
Hiccup overcurrent and short protection