SNVSCL2 Data sheet

SNVSCL2 December 2024 LM51770

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8.3.8 Voltage Regulation Loop

The LM51770 features an internal error amplifier (EA) to regulate the output voltage. The output voltage gets sensed on the FB pin through external resistors, which determine the target or nominal output voltage. The reference for the EA builds the soft-start and analog output voltage tracking pin (SS/ATRK). The COMP pin is the output of the internal gm-stage and gets connected to the external compensation network. The voltage over the compensation network is the nominal value for the inner peak current control loop of the device.

LM51770 Functional Block Diagram of the Voltage and Peak Current Control Loop

Figure 8-14 Functional Block Diagram of the Voltage and Peak Current Control Loop

Use the following equations to calculate the external components:

External Feedback:

Equation 3.

R_{(C O M P)} = \frac{2 π \times f_{(B W)}}{{g m}_{(e a)}} \times \frac{R_{(F B, b o t)} + R_{(F B, t o p)}}{R_{(F B, b o t)}} \times \frac{10 \times R_{(C S)} \times C_{O}}{1 - D_{m a x}}

Equation 4.

C_{(C O M P)} = \frac{1}{2 π \times f_{(C Z)} \times R_{(C O M P)}}

Equation 5.

C_{(P C O M P)} = \frac{1}{2 π \times 10 \times f_{(B W)} \times R_{(C O M P)}}

For most applications, TI recommends the following guidelines for bandwidth selection of the compensation.

The hard limit of the bandwidth (f_(BW)) is the right half plane zero of the boost operation:

Equation 6.

f_{R H P Z} = \frac{1}{2 π} \times \frac{{V_{(V O U T)} \times (1 - D_{m a x})}^{2}}{I_{o, m a x} \times L}

The maximum recommended bandwidth must be within the following boundaries:

Equation 7.

{f_{(B W)} < \frac{1}{3} \times f}_{R H P Z}

Equation 8.

{f_{(B W)} < \frac{1}{10} \times (1 - D_{m a x}) \times f}_{(S W)}

The compensation zero (f_CZ) must be placed in relation to the dominating pole of the boost.

Equation 9.

f_{C Z} {= 1.5 \times f}_{p o l e, b o o s t}

Equation 10.

f_{p o l e, b o o s t} = \frac{1}{2 π} \times \frac{2 \times I_{o, m a x}}{V_{(V O U T)} \times C_{o}}

Due to the precise implementation of the error amplifier, the voltage on the LM51770 COMP pin is accurately reflecting the nominal peak current value of the inductor. Figure 8-15 shows the control V/I-characteristics of the error amplifier in FPWM mode. Use this as a guidance for applicative designs where you need to manipulate the inner current loop regulation.

LM51770 Control Function for the Peak Current Sense Voltage Versus VCOMP

Figure 8-15 Control Function for the Peak Current Sense Voltage Versus V_COMP

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8.3.8 Voltage Regulation Loop