JAJSFS7B July   2018  – February  2019 LM5180-Q1

ADVANCE INFORMATION for pre-production products; subject to change without notice.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
      2.      標準的な効率、VOUT = 5V
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Integrated Power MOSFET
      2. 8.3.2  PSR Flyback Modes of Operation
      3. 8.3.3  Setting the Output Voltage
        1. 8.3.3.1 Diode Thermal Compensation
      4. 8.3.4  Control Loop Error Amplifier
      5. 8.3.5  Precision Enable
      6. 8.3.6  Configurable Soft Start
      7. 8.3.7  External Bias Supply
      8. 8.3.8  Minimum On-Time and Off-Time
      9. 8.3.9  Overcurrent Protection
      10. 8.3.10 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1: Wide VIN, Low IQ PSR Flyback Converter Rated at 5 V, 1 A
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2  Custom Design With Excel Quickstart Tool
          3. 9.2.1.2.3  Flyback Transformer – T1
          4. 9.2.1.2.4  Flyback Diode – DFLY
          5. 9.2.1.2.5  Clamp Circuit – DF, DCLAMP
          6. 9.2.1.2.6  Output Capacitor – COUT
          7. 9.2.1.2.7  Input Capacitor – CIN
          8. 9.2.1.2.8  Feedback Resistor – RFB
          9. 9.2.1.2.9  Thermal Compensation Resistor – RTC
          10. 9.2.1.2.10 UVLO Resistors – RUV1, RUV2
          11. 9.2.1.2.11 Soft-Start Capacitor – CSS
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2: PSR Flyback Converter With Dual Outputs of 15 V and –7.7 V at 200 mA
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Flyback Transformer – T1
          2. 9.2.2.2.2 Flyback Diodes – DFLY1 and DFLY2
          3. 9.2.2.2.3 Input Capacitor – CIN
          4. 9.2.2.2.4 Feedback Resistor – RFB
          5. 9.2.2.2.5 UVLO Resistors – RUV1, RUV2
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Design 3: PSR Flyback Converter With Stacked Dual Outputs of 24 V and 5 V
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1 Flyback Transformer – T1
          2. 9.2.3.2.2 Feedback Resistor – RFB
          3. 9.2.3.2.3 UVLO Resistors – RUV1, RUV2
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 12.1.2 開発サポート
      3. 12.1.3 WEBENCH® ツールによるカスタム設計
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Power Supply Recommendations

The LM5180-Q1 flyback converter is designed to operate from a wide input voltage range from 4.5 V to 65 V. The characteristics of the input supply must be compatible with the Absolute Maximum Ratings and Recommended Operating Conditions. In addition, the input supply must be capable of delivering the required input current to the fully-loaded regulator. Estimate the average input current with Equation 42.

Equation 42. LM5180-Q1 Iin_max1.gif

where

  • η is the efficiency

If the converter is connected to an input supply through long wires or PCB traces with a large impedance, special care is required to achieve stable performance. The parasitic inductance and resistance of the input cables may have an adverse affect on converter operation. The parasitic inductance in combination with the low-ESR ceramic input capacitors form an underdamped resonant circuit. This circuit can cause overvoltage transients at VIN each time the input supply is cycled ON and OFF. The parasitic resistance causes the input voltage to dip during a load transient. If the regulator is operating close to the minimum input voltage, this dip can cause false UVLO fault triggering and a system reset. The best way to solve such issues is to reduce the distance from the input supply to the regulator and use an aluminum electrolytic input capacitor in parallel with the ceramics. The moderate ESR of the electrolytic capacitors helps to damp the input resonant circuit and reduce any voltage overshoots. A capacitance in the range of 10 µF to 47 µF is usually sufficient to provide input damping and helps to hold the input voltage steady during large load transients. A typical ESR of 0.25 Ω provides enough damping for most input circuit configurations.

An EMI input filter is often used in front of the regulator that, unless carefully designed, can lead to instability as well as some of the effects mentioned above. The application report Simple Success with Conducted EMI for DC-DC Converters provides helpful suggestions when designing an input filter for any switching regulator.