JAJSP12
July 2024
LM5190-Q1
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
4.1
Wettable Flanks
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Input Voltage Range (VIN)
6.3.2
High-Voltage Bias Supply Regulator (VCC, BIAS)
6.3.3
Precision Enable (EN)
6.3.4
Power-Good Monitor (PGOOD)
6.3.5
Switching Frequency (RT)
6.3.6
Low Dropout Mode
6.3.7
Dual Random Spread Spectrum (DRSS)
6.3.8
Soft Start
6.3.9
Output Voltage Setpoint (FB)
6.3.10
Minimum Controllable On Time
6.3.11
Inductor Current Sense (ISNS+, VOUT)
6.3.12
Voltage Loop Error Amplifier
6.3.13
Current Monitor, Programmable Current Limit, and Current Loop Error Amplifier (IMON/ILIM, ISET)
6.3.14
Dual Loop Architecture
6.3.15
PWM Comparator
6.3.16
Slope Compensation
6.3.17
High-Side and Low-Side Gate Drivers (HO, LO)
6.4
Device Functional Modes
6.4.1
Sleep Mode
6.4.2
Forced PWM Mode and Synchronization (FPWM/SYNC)
6.4.3
Thermal Shutdown
7
Application and Implementation
7.1
Application Information
7.1.1
Power Train Components
7.1.1.1
Buck Inductor
7.1.1.2
Output Capacitors
7.1.1.3
Input Capacitors
7.1.1.4
Power MOSFETs
7.1.1.5
EMI Filter
7.1.2
Error Amplifier and Compensation
7.2
Typical Applications
7.2.1
High Efficiency 400kHz CC-CV Regulator
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Custom Design With Excel Quickstart Tool
7.2.1.2.2
Recommended Components
7.2.1.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
Power Stage Layout
7.4.1.2
Gate-Drive Layout
7.4.1.3
PWM Controller Layout
7.4.1.4
Thermal Design and Layout
7.4.1.5
Ground Plane Design
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.2
Documentation Support
8.2.1
Related Documentation
8.2.1.1
PCB Layout Resources
8.2.1.2
Thermal Design Resources
8.3
ドキュメントの更新通知を受け取る方法
8.4
サポート・リソース
8.5
Trademarks
8.6
静電気放電に関する注意事項
8.7
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
10.1
Tape and Reel Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGY|19
MPQF777A
サーマルパッド・メカニカル・データ
発注情報
jajsp12_oa
7.2.1.3
Application Curves
Figure 7-5
FPWM Mode Efficiency, Linear Scale
Figure 7-7
Start-Up, EN ON, V
SUPPLY
= 48V, I
LOAD
= 8A Resistive Load
Figure 7-9
Output Ripple, , V
SUPPLY
= 48V, I
LOAD
= 8A
Figure 7-11
Load Transient Response, V
SUPPLY
= 48V, FPWM, 0A to 4A
Figure 7-13
ISET Modulation, V
SUPPLY
= 48V, R
LOAD
= 1.35Ω
Figure 7-6
PFM Mode Efficiency, Log Scale
Figure 7-8
Shutdown, EN OFF, V
SUPPLY
= 48V, I
LOAD
= 8A Resistive Load
Figure 7-10
No Load Operation in PFM Mode, V
SUPPLY
= 48V, I
LOAD
= 0A
Figure 7-12
Load Transient Response, V
SUPPLY
= 48V, PFM, 0A to 4A
Figure 7-14
V
SUPPLY
= 48V, I
LOAD
= 8A, T
A
= 25°C, No Airflow