SNVSCR9A October   2024  – December 2024 LM61480T-Q1 , LM61495T-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Output Voltage Selection
      2. 7.3.2  Enable EN Pin and Use as VIN UVLO
      3. 7.3.3  SYNC/MODE Uses for Synchronization
      4. 7.3.4  Clock Locking
      5. 7.3.5  Adjustable Switching Frequency
      6. 7.3.6  RESET Output Operation
      7. 7.3.7  Internal LDO, VCC UVLO, and BIAS Input
      8. 7.3.8  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      9. 7.3.9  Adjustable SW Node Slew Rate
      10. 7.3.10 Spread Spectrum
      11. 7.3.11 Soft Start and Recovery From Dropout
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Hiccup
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 Peak Current Mode Operation
        2. 7.4.3.2 Auto Mode Operation
          1. 7.4.3.2.1 Diode Emulation
        3. 7.4.3.3 FPWM Mode Operation
        4. 7.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
        6. 7.4.3.6 Recovery from Dropout
        7. 7.4.3.7 Other Fault Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Choosing the Switching Frequency
        2. 8.2.2.2  Setting the Output Voltage
        3. 8.2.2.3  Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  BOOT Capacitor
        7. 8.2.2.7  BOOT Resistor
        8. 8.2.2.8  VCC
        9. 8.2.2.9  CFF and RFF Selection
        10. 8.2.2.10 RSPSP Selection
        11. 8.2.2.11 RT Selection
        12. 8.2.2.12 RMODE Selection
        13. 8.2.2.13 External UVLO
        14. 8.2.2.14 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Glossary
    7. 9.7 Electrostatic Discharge Caution
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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発注情報

5 Pin Configuration and Functions

Figure 5-1 16-Pin VQFN-HR,VAM Package (Top View)
Table 5-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMENO.
PGND21GPower ground to internal low-side MOSFET. Connect to system ground. Low-impedance connection must be provided to PGND1. Connect a high-quality bypass capacitor or capacitors from this pin to VIN2.
VIN22PInput supply to the regulator. Connect a high-quality bypass capacitor or capacitors from this pin to PGND2. Provide a low-impedance connection to VIN1.
RBOOT3PConnect to CBOOT through a resistor. A resistance, typically between 0Ω and 100Ω, is used to adjust the slew rate of the SW node rise time. See Figure 7-10.
CBOOT4PHigh-side driver upper supply rail. Connect a 100nF capacitor between the SW pin and CBOOT. An internal diode charges the capacitor while SW node is low.
BIAS5PInput to internal voltage regulator. Connect the pin to an output voltage point or an external bias supply from 3.3V to 12V. Connect an optional high-quality 0.1µF capacitor from this pin to GND for the best performance. If output voltage is above 12V and no external supply is used, tie the pin to ground.
VCC6OInternal regulator output. Used as supply to internal control circuits. Do not connect this pin to any external loads. Connect a high-quality 1µF capacitor from this pin to AGND.
FB7IFeedback input to regulator. Connect this pin to a feedback divider tap point. Do not float or ground.
AGND8GAnalog ground for regulator and system. All electrical parameters are measured with respect to this pin. Connect this pin to PGND1 and PGND2 on PCB.
RT9I/OConnect this pin to ground through a resistor with a value between 6.8kΩ and 80kΩ to set the switching frequency between 200kHz and 2200kHz. Connect to VCC for 400kHz. Connect to GND for 2.2MHz. Do not float.
RESET10OOpen-drain RESET output. Connect to a suitable voltage supply through a current limiting resistor. High = power OK, low = fault. RESET goes low when EN = low.
SPSP11IConnect to GND to disable spread spectrum. Connect to VCC or through a resistor to ground to enable spread spectrum. If using spread spectrum, a VCC connection turns off the spread spectrum tone correction while a resistor to ground adjusts the tone correction to lower the output voltage ripple. Do not float this pin. See Section 7.3.10.
SYNC/MODE12IThis pin controls the mode of operation of the LM614xxT-Q1. Modes include Auto mode (automatic PFM/PWM operation), forced pulse width modulation (FPWM), and synchronized to an external clock. The clock triggers on the rising edge of an applied external clock. Pull low to enable Auto mode of operation, pull high to enable FPWM, or connect to a clock to synchronize to an external frequency in FPWM mode. Do not float this pin.

When synchronized to an external clock, use the RT pin to set the internal frequency close to the synchronized frequency to avoid disturbances if the external clock is turned on and off.

EN13IPrecision enable input to regulator. High = on, low = off. Can be connected to VIN. Precision enable allows the pin to be used as an adjustable UVLO. Do not float. See Section 7.3.2.
VIN114PInput supply to the regulator. Connect a high-quality bypass capacitor or capacitors from this pin to PGND1. Low-impedance connection must be provided to VIN2.
PGND115GPower ground to internal low-side MOSFET. Connect to system ground. Low-impedance connection must be provided to PGND2. Connect a high-quality bypass capacitor or capacitors from this pin to VIN1.
SW16PSwitch node of the regulator. Connect to the output inductor.
(1) I = input, O = output, P = power, G = ground