JAJSJO6C December 2021 – August 2024 LM63440-Q1 , LM63460-Q1
PRODUCTION DATA
The following operating description of the converter refers to the Functional Block Diagram and to the waveforms in Figure 7-12. In CCM, the converter supplies a regulated output voltage by turning on the internal high-side (HS) and low-side (LS) NMOS switches with varying duty cycle (D). During the HS switch on time, the SW voltage, VSW, swings up to approximately VIN, and the inductor current, iL, increases with a linear slope. The HS switch is turned off by the control logic. During the HS switch off time, tOFF, the LS switch is turned on. Inductor current discharges through the LS switch, which forces VSW to swing below ground by the voltage drop across the LS switch. The control loop adjusts the duty cycle to maintain a constant output voltage. D is defined by the on time of the HS switch over the switching period:
In an ideal buck converter where losses are ignored, D is proportional to the output voltage and inversely proportional to the input voltage: