JAJSJO6C December   2021  – August 2024 LM63440-Q1 , LM63460-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1. 5.1 Wettable Flanks
    2. 5.2 Pinout Design for Clearance and FMEA
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Systems Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range (VIN1, VIN2)
      2. 7.3.2  Output Voltage Setpoint (FB)
      3. 7.3.3  Precision Enable and Input Voltage UVLO (EN/SYNC)
      4. 7.3.4  Frequency Synchronization (EN/SYNC)
      5. 7.3.5  Clock Locking
      6. 7.3.6  Adjustable Switching Frequency (RT)
      7. 7.3.7  Power-Good Monitor (PGOOD)
      8. 7.3.8  Bias Supply Regulator (VCC, BIAS)
      9. 7.3.9  Bootstrap Voltage and UVLO (CBOOT)
      10. 7.3.10 Spread Spectrum
      11. 7.3.11 Soft Start and Recovery From Dropout
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Input Supply Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 AUTO Mode – Light-Load Operation
          1. 7.4.3.2.1 Diode Emulation
          2. 7.4.3.2.2 Frequency Foldback
        3. 7.4.3.3 FPWM Mode – Light-Load Operation
        4. 7.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1 – Automotive Synchronous 6A Buck Regulator at 2.1MHz
        1. 8.2.1.1 Design Requirements
      2. 8.2.2 Design 2 – Automotive Synchronous 4A Buck Regulator at 2.1MHz
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.2.2.2  Setting the Output Voltage
          3. 8.2.2.2.3  Choosing the Switching Frequency
          4. 8.2.2.2.4  Inductor Selection
          5. 8.2.2.2.5  Output Capacitor Selection
          6. 8.2.2.2.6  Input Capacitor Selection
          7. 8.2.2.2.7  Bootstrap Capacitor
          8. 8.2.2.2.8  VCC Capacitor
          9. 8.2.2.2.9  BIAS Power Connection
          10. 8.2.2.2.10 Feedforward Network
          11. 8.2.2.2.11 Input Voltage UVLO
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Design 3 – Automotive Synchronous 6A Buck Regulator at 400kHz
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Design and Layout
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3.1 Design Requirements

Table 8-9 shows the intended input, output, and performance parameters for this application example. Note that during cold-crank operation when the input voltage decreases to 4V, the converter operates close to dropout but the output voltage remains at 3.3V setpoint.

Table 8-9 Design Parameters
DESIGN PARAMETER VALUE
Input voltage range, steady state 4V to 36V
Maximum transient input voltage, load dump 42V
Output voltage and full-load current 3.3V, 6A
Switching frequency 400kHz
Output voltage regulation ±1%
IC input current, no-load < 10µA
IC shutdown current < 1µA

Table 8-10 gives the selected buck converter power-stage components with availability from multiple vendors. This design uses a low-DCR inductor and all-ceramic output capacitor implementation.

Table 8-10 List of Materials for Application Circuit 3
REF DES QTY SPECIFICATION VENDOR (1) PART NUMBER
CIN 4 10µF, 50V, X7R, 1210, ceramic, AEC-Q200 AVX 12105C106K4T2A
TDK CNA6P1X7R1H106K
10µF, 50V, X7S, 1210, ceramic, AEC-Q200 Murata GCM32EC71H106KA03
TDK CGA6P3X7S1H106M
COUT 2 100µF, 6.3V, X7S, 1210, ceramic, AEC-Q200 Murata GRT32EC70J107ME13
3 47µF, 6.3V, X7R, 1210, ceramic, AEC-Q200 Murata GCM32ER70J476KE19L
Taiyo Yuden JMK325B7476KMHTR
LO 1 3.3µH, 13.3mΩ, 8.4A, 5.0mm × 5.0mm × 3.1mm, AEC-Q200 Coilcraft XGL5030-332MEC
3.3µH, 10mΩ, 8.6A, 5.5mm × 5.3mm × 5.1mm, AEC-Q200 Coilcraft XGL5050-332MEC
3.3µH, 22.5mΩ, 8.3A, 6.9mm × 6.8mm × 2.8mm, AEC-Q200 Cyntec VCMT063T-3R3MN5TM
3.3µH, 19mΩ, 16.6A, 7.3mm × 6.6mm × 4.8mm, AEC-Q200 Würth Electronik 74437349033
3.3µH, 17.1mΩ, 7.6A, 7.0mm × 6.5mm × 4.5mm, AEC-Q200 TDK SPM6545VT-3R3M-D
U1 1 LM63460-Q1 synchronous buck converter, AEC-Q100 AUTO Texas Instruments LM63460AASQRYFRQ1
FPWM LM63460AFSQRYFRQ1
(1) See the Section 9.1.1.