JAJSVQ2 November   2024 LM644A2-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1. 5.1 Wettable Flanks
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range (VIN)
      2. 7.3.2  Enable EN Pin and Use as VIN UVLO
      3. 7.3.3  Output Voltage Selection and Soft Start
      4. 7.3.4  SYNC Allows Clock Synchronization and Mode Selection
      5. 7.3.5  Clock Locking
      6. 7.3.6  Adjustable Switching Frequency
      7. 7.3.7  Power-Good Output Voltage Monitoring
      8. 7.3.8  Internal LDO, VCC UVLO, and BIAS Input
      9. 7.3.9  Bootstrap Voltage and VCBOOT-UVLO (CB1 and CB2 Pin)
      10. 7.3.10 CONFIG Device Configuration Pin
      11. 7.3.11 Spread Spectrum
      12. 7.3.12 Soft Start and Recovery From Dropout
      13. 7.3.13 Overcurrent and Short-Circuit Protection
      14. 7.3.14 Hiccup
      15. 7.3.15 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 Peak Current Mode Operation
        2. 7.4.3.2 Auto Mode Operation
          1. 7.4.3.2.1 Diode Emulation
        3. 7.4.3.3 FPWM Mode Operation
        4. 7.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
        6. 7.4.3.6 Recovery from Dropout
        7. 7.4.3.7 Other Fault Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Choosing the Switching Frequency
        2. 8.2.2.2  Setting the Output Voltage
        3. 8.2.2.3  Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  BOOT Capacitor
        7. 8.2.2.7  VCC
        8. 8.2.2.8  CFF and RFF Selection
        9. 8.2.2.9  SYNCHRONIZATION AND MODE
        10. 8.2.2.10 External UVLO
        11. 8.2.2.11 Typical Thermal Performance
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The LM644A2-Q1 is a wide-input, synchronous, buck DC/DC converter for high-current single or dual outputs. The device uses an interleaved, stackable, current-mode control architecture for easy loop compensation, fast transient response, excellent load and line regulation, and accurate current sharing stackable up to six phases for higher output currents up to 36A.

A high-side switch minimum on-time of 50ns allows large step-down ratios, enabling the direct conversion from 12V, 24V, or automotive inputs to low-voltage rails for reduced system complexity and design cost. The LM644A2-Q1 supports input voltage dips as low as 3V, at nearly 100% duty cycle. If the minimum on-time or minimum off-time does not support the desired conversion ratio, the frequency is reduced. This action automatically allows regulation to be maintained during load dump and with very low dropout during cranking.

Power the bias of LM644A2-Q1 from the output of the converter for lower input quiescent current and power loss. Achieving 9μA no-load quiescent current in dual output configuration to extend operating run-time in battery-powered systems.

The LM644A2-Q1 has been designed for low EMI. The device includes the following:

  • Reduction of noise at the fundamental switching frequency through interleaving
    • To reduce input capacitor ripple current and EMI filter size, the device can be configured to operate in a stack of either two, four or six phases with corresponding phase shift interleave operation based on the number of phases. For example, in a 4-phase setup, a 90° out-of-phase clock output setup works well for cascaded, multi-channel, or multi-phase power stages. Phase relationship is maintained in light load operation for low output voltage ripple.
  • Pin-enabled dual random spread spectrum (DRSS)
    • Dual Random Spread Spectrum (DRSS) frequency hopping is set to ±10% (typical), drastically reducing peak emissions through a combination of triangular and pseudorandom modulation.
  • Symmetrical VIN pinout for low input inductance
  • Operation over a frequency range above and below AM radio band
    • Resistor-adjustable switching frequency adjustable from 100kHz to 2.2MHz can be synchronized to an external clock source to eliminate beat frequencies in noise-sensitive applications.
Together, these features can eliminate shielding and other expensive EMI mitigation measures.

The device also includes the following features:

  • Internal fixed soft start or adjustable soft start using an external capacitor with monotonic start-up into prebiased loads
  • Open-drain Power-Good flags with built-in delayed release for fault reporting and output monitoring
  • Independent enable inputs
  • Integrated VCC bias supply regulator
  • Hiccup-mode overload protection
  • Thermal shutdown protection with automatic recovery
The LM644A2-Q1 comes in a 5mm × 4mm, enhanced, HotRod QFN 24-pin package with enlarged corner terminals for improved BLR and wettable flanks, allowing for optical inspection and allowing use in reliability-conscious environments