JAJSVB4 September   2024 LM65645-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1 Output Voltage Selection
      2. 7.3.2 EN Pin and Use as VIN UVLO
      3. 7.3.3 Mode Selection
        1. 7.3.3.1 MODE/SYNC Pin Uses for Synchronization
        2. 7.3.3.2 Clock Locking
      4. 7.3.4 Adjustable Switching Frequency
      5. 7.3.5 Dual Random Spread Spectrum (DRSS)
      6. 7.3.6 Internal LDO, VCC UVLO, and BIAS Input
      7. 7.3.7 Bootstrap Voltage (BST Pin)
      8. 7.3.8 Soft Start and Recovery From Dropout
      9. 7.3.9 Safety Features
        1. 7.3.9.1 Power-Good Monitor
        2. 7.3.9.2 Overcurrent and Short-Circuit Protection
        3. 7.3.9.3 Hiccup
        4. 7.3.9.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Peak Current Mode Operation
        2. 7.4.2.2 Auto Mode Operation
          1. 7.4.2.2.1 Diode Emulation
        3. 7.4.2.3 FPWM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Choosing the Switching Frequency
        3. 8.2.2.3 FB for Adjustable or Fixed Output Voltage Mode
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 CBOOT
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
  • RZT|20
サーマルパッド・メカニカル・データ
発注情報

6.6 System Characteristics

The following specifications apply only to the typical applications circuit, with nominal component values. Specifications in the typical (TYP) column apply to TJ = 25°C only. Specifications in the minimum (MIN) and maximum (MAX) columns apply to the case of typical components over the temperature range of TJ = –40°C to 150°C. These specifications are not specified by production testing.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN_MIN1 VIN for full functionality, after start-up VVOUT set to 3.3V 3 V
IQ_VIN Operating input quiescent current at VIN PIN for fixed VOUT option VIN = 24.0V, IOUT = 0A, VOUT = 3.3V (fixed), VFB = 0V, VBIAS = VVOUT, PFM mode 1.8 µA
Operating input quiescent current at VIN PIN for fixed VOUT option VIN = 24.0V, IOUT = 0A, VOUT = 5.0V (fixed), VFB = VVCC, VBIAS = VVOUT, PFM mode 1.8 µA
IQ_VIN Operating input quiescent current at VIN PIN for fixed VOUT option VIN = 13.5V, IOUT = 0A, VOUT = 3.3V (fixed), VFB = 0V, VBIAS = VOUT, PFM mode 3.0 µA
Operating input quiescent current at VIN PIN for fixed VOUT option VIN = 13.5V, IOUT = 0A, VOUT = 5.0V (fixed), VFB = VVCC, VBIAS = VVOUT, PFM mode 3.0 µA
OUTPUT VOLTAGE
VVOUT_5V_ACC Load and Line regulation for 5V VOUT (fixed and adjustable) VIN = 4V to 42V, IOUT = 0A to full load, FPWM Mode –1.5 1.5 %
VIN = 4V to 42, IOUT = 0A to full load, PFMMode –1.5 2.5 %
VVOUT_3P3V_ACC Load and Line regulation for 3.3V VOUT (fixed and adjustable) VIN = 4V to 42V, IOUT = 0A to full load, FPWM Mode –1.5 1.5 %
VIN = 4V to 42, IOUT = 0A to full load, PFM Mode –1.5 2.5 %
DMAX Maximum switch duty cycle FSW = 400kHz, while in frequency foldback 99 %
EFFICIENCY
MISCELLEANEOUS
VDROP Input to output voltage differential to maintain fSW ≥ 1.85MHz, without inductor DCR drop TBD