JAJSOR6 September 2024 LM706A0-Q1
PRODUCTION DATA
The EN/UVLO pin can be connected to a voltage as high as 65V. The LM706A0-Q1 has a precision enable. When the EN pin is greater than 1V, the output is enabled. If the EN pin is pulled below 0.55V (typical), the LM706A0-Q1 is in shutdown with an IQ of 2.3μA (typical) current draw from VIN. When the enable voltage is between 0.55V (typical) and 1V (typical), the LM706A0-Q1 is in standby mode. When in standby mode, the VCC regulator is enabled, the device is not switching, and the IQ current is 350μA (typical). Users can also enable the LM706A0-Q1 with standard CMOS logic drivers. A voltage greater than 2.0V enables the LM706A0-Q1, and a voltage less than 0.4V disables the LM706A0-Q1. However, many applications benefit from using a resistor divider RUV1 and RUV2 as shown in Figure 6-2 to establish a precision UVLO threshold. TI recommends setting the input voltage turn-on threshold at 4.5V or higher when the rise time of the input supply to the LM706A0-Q1 is significantly slower than the internal soft-start time. TI does not recommend leaving the EN pin floating.
Use Equation 2 to calculate the UVLO resistors given the required input turn-on voltage. The EN voltage hysteresis, VEN-HYS, is 100mV or 10% of the EN voltage rising threshold, VEN-TH, therefore the input turn-off voltage is 90% of the input turn-on voltage.