JAJSOY6A May   2023  – December 2023 LM74703-Q1 , LM74704-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Gate Driver
      4. 8.3.4 Enable
      5. 8.3.5 FET Status Indication (FETGOOD)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Conduction Mode
        1. 8.4.2.1 Regulated Conduction Mode
        2. 8.4.2.2 Full Conduction Mode
        3. 8.4.2.3 Reverse Current Protection Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 MOSFET Selection
        3. 9.2.2.3 Charge Pump VCAP, Input and Output Capacitance
        4. 9.2.2.4 Selection of TVS Diodes for 12-V Battery Protection Applications
        5. 9.2.2.5 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Switching Characteristics

TJ = –40°C to 125°C; typical values at TJ = 25°C, V(ANODE) = 12 V, C(VCAP+) = 0.1 µF, V(EN) = 3.3 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ENTDLY Enable (low to high) to gate turn on delay V(VCAP) > V(VCAP UVLOR) 75 115 µs
tReverse delay Reverse voltage detection to gate turn off delay V(ANODE) – V(CATHODE) = 100 mV to –100 mV 0.5 0.75 µs
tForward recovery Forward voltage detection to gate turn on delay V(ANODE) – V(CATHODE) = –100 mV to 700 mV 1.4 2.6 µs
tFETGOOD_ASSERT(DLY) FETGOOD assert delay VANODE – VCATHODE > 200 mV or VCAP < VCAP_UVLO to FETGOOD ↓ 40 60 us
tFETGOOD_DEASSERT(DLY) FETGOOD de-assert delay VANODE – VCATHODE < 200 mV and VCAP > VCAP_UVLO to FETGOOD ↑ 5 us