JAJSD27B
march 2017 – april 2023
LMG1205
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input and Output
7.3.2
Start-up and UVLO
7.3.3
HS Negative Voltage and Bootstrap Supply Voltage Clamping
7.3.4
Level Shift
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
VDD Bypass Capacitor
8.2.2.2
Bootstrap Capacitor
8.2.2.3
Power Dissipation
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Examples
11
Device and Documentation Support
11.1
Device Support
11.1.1
サード・パーティ製品に関する免責事項
11.2
Documentation Support
11.2.1
Related Documentation
11.3
ドキュメントの更新通知を受け取る方法
11.4
サポート・リソース
11.5
Trademarks
11.6
静電気放電に関する注意事項
11.7
用語集
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
YFX|12
MXBG187A
サーマルパッド・メカニカル・データ
発注情報
jajsd27b_oa
jajsd27b_pm
6.7
Typical Characteristics
Figure 6-2
Peak Source Current vs Output Voltage
Figure 6-4
I
DDO
vs Frequency
Figure 6-6
I
DD
vs Temperature
Figure 6-8
UVLO Rising Thresholds vs Temperature
Figure 6-10
Input Thresholds vs Temperature
Figure 6-12
Bootstrap Diode Forward Voltage
Figure 6-14
LO & HO Gate Drive – High/Low Level Output Voltage vs Temperature
Figure 6-3
Peak Sink Current vs Output Voltage
Figure 6-5
I
HBO
vs Frequency
Figure 6-7
I
HB
vs Temperature
Figure 6-9
UVLO Falling Thresholds vs Temperature
Figure 6-11
Input Threshold Hysteresis vs Temperature
Figure 6-13
Propagation Delay vs Temperature
Figure 6-15
HB Regulation Voltage vs Temperature