JAJSK05D September 2020 – March 2022 LMG3422R030 , LMG3425R030
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
NC1 | 1, 16 | — | Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to DRAIN. |
DRAIN | 2-15 | P | GaN FET drain. Internally connected to NC1. |
NC2 | 17, 54 | — | Used to anchor QFN package to PCB. Pins must be soldered to PCB landing pads. The PCB landing pads are non-solder mask defined pads and must not be physically connected to any other metal on the PCB. Internally connected to SOURCE, GND, and THERMAL PAD. |
SOURCE | 18-40 | P | GaN FET source. Internally connected to GND, NC2, and THERMAL PAD. |
VNEG | 41-42 | P | Internal buck-boost converter negative output. Used as the negative supply to turn off the depletion mode GaN FET. Bypass to ground with a 2.2-µF capacitor. |
BBSW | 43 | P | Internal buck-boost converter switch pin. Connect an inductor from this point to ground. |
GND | 44, 45, 49 | G | Signal ground. Internally connected to SOURCE, NC2, and THERMAL PAD. |
VDD | 46 | P | Device input supply. |
IN | 47 | I | CMOS-compatible non-inverting input used to turn the FET on and off. |
FAULT | 48 | O | Push-pull digital output that asserts low during a fault condition. Refer to Fault Detection for details. |
OC | 50 | O | Push-pull digital output that asserts low during overcurrent and short-circuit fault conditions. Refer to Fault Detection for details. |
TEMP | 51 | O | Push-pull digital output that gives information about the GaN FET temperature. Outputs a fixed 9-kHz pulsed waveform. The device temperature is encoded as the duty cycle of the waveform. |
RDRV | 52 | I | Drive strength selection pin. Connect a resistor from this pin to ground to set the turn-on drive strength to control slew rate. Tie the pin to GND to enable 150 V/ns and tie the pin to LDO5V to enable 100 V/ns. |
LDO5V | 53 | P | 5-V LDO output for external digital isolator |
THERMAL PAD | — | — | Thermal pad. Internally connected to SOURCE, GND, and NC2. The thermal pad can be used to conduct rated device current. |