SNOSDI3 March 2024 LMG3425R030
PRODUCTION DATA
Operational ideal-diode mode (OP-IDM) is implemented in the LMG3425R030 but not in the LMG3422R030. Understand that the OP-IDM function is not a general-purpose ideal-diode mode function which allows the LMG3425R030 to autonomously operate as a diode, including as an autonomous synchronous rectifier. Furthermore, the OP-IDM function is not intended to support an ideal-diode mode transition from the on-state to the off-state in a high-voltage, hard-switched application. Exposing the LMG3425R030 to this situation is akin to operating a half-bridge power stage with negative dead time with corresponding high shoot-through current.
Instead, as described below, the LMG3425R030 OP-IDM function is narrowly implemented to address a specific off-state third-quadrant current flow situation while minimizing situations where the ideal-diode mode can create a dangerous shoot-through current event.
OP-IDM is intended to minimize GaN FET off-state third-quadrant losses that occur in a zero-voltage switched (ZVS) event. ZVS events are seen in applications such as synchronous rectifiers and LLC converters. The ZVS event occurs at the FET off-state to on-state transition when an inductive element discharges the FET drain voltage before the FET is turned-on. The discharge ends with the inductive element pulling the FET drain-source voltage negative and the FET conducting off-state third-quadrant current.
Power supply controllers use dead-time control to set the time for the ZVS event to complete before turning on the FET. Both the ZVS time and resulting FET off-state third-quadrant current are a function of the power converter operation. Long ZVS time and low third-quadrant current occur when the inductive element is slewing the FET with low current and short ZVS time and high third-quadrant current occur when the inductive element is slewing at the FET with high current. Sophisticated controllers optimally adjust the dead time to minimize third-quadrant losses. Simpler controllers use a fixed dead time to handle the longest possible ZVS time. Thus, in a fixed dead-time application, the highest possible off-state third-quadrant losses occur for the longest possible time.
OP-IDM mitigates the losses in a fixed dead-time application by automatically turning on the GaN FET as soon as third-quadrant current is detected. In this sense, OP-IDM can be described as providing a turn-on assist function with optimum dead-time control. Meanwhile, OP-IDM is not intended to be used to turn-off the GaN FET in normal operation. OP-IDM turnoff capability is only provided as a protection mechanism to guard against shoot-through current.
OP-IDM works within the confines of normal LMG3425R030 switching operation as controlled by the IN pin. The key consideration for the OP-IDM operation is to ensure the turn-on assist function is only activated on the ZVS edge. For example, third-quadrant current is seen in a LMG3425R030 used as a synchronous rectifier both before the IN pin goes high to turn on the GaN FET and after the IN pin goes low to turn off the GaN FET. OP-IDM turns on the GaN FET before the IN pin goes high when OP-IDM detects third-quadrant current. But it would be a mistake for OP-IDM to turn the GaN FET back on right after IN has turned it off because OP-IDM detects third-quadrant current. If OP-IDM were to turn on the GaN FET in this situation, it would create a shoot-through current event when the opposite-side power switch turns on. OP-IDM avoids this shoot-through current problem on the turn-off edge by requiring the drain voltage to first go positive before looking for the ZVS event.
The OP-IDM state machine is shown in Figure 7-6. Each state is assigned a state number in the upper right side of the state box.
OP-IDM can only turn on the GaN FET once per IN cycle. If an unexpected shoot-through current is detected between OP-IDM turning on the GaN FET and the IN pin going high, OP-IDM locks the GaN FET off for the remainder of the IN cycle.
Understand that the OP-IDM function turns on the GaN FET, after IN goes low, if it sees a positive drain voltage followed by a negative drain voltage. A design using the LMG3425R030 must be analyzed for any situations where this sequence of events creates a shoot-through current event. The analysis must include all power system corner cases including start-up, shutdown, no load, overload, and fault events. Note that discontinuous mode conduction (DCM) operation can easily create an OP-IDM shoot-through current event when the ringing at the end of a DCM cycle triggers OP-IDM to turn on the GaN FET.