JAJSL98D October   2020  – February 2024 LMG3522R030-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Switching Parameters
      1. 6.1.1 Turn-On Times
      2. 6.1.2 Turn-Off Times
      3. 6.1.3 Drain-Source Turn-On Slew Rate
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  GaN FET Operation Definitions
      2. 7.3.2  Direct-Drive GaN Architecture
      3. 7.3.3  Drain-Source Voltage Capability
      4. 7.3.4  Internal Buck-Boost DC-DC Converter
      5. 7.3.5  VDD Bias Supply
      6. 7.3.6  Auxiliary LDO
      7. 7.3.7  Fault Detection
        1. 7.3.7.1 Overcurrent Protection and Short-Circuit Protection
        2. 7.3.7.2 Overtemperature Shutdown
        3. 7.3.7.3 UVLO Protection
        4. 7.3.7.4 Fault Reporting
      8. 7.3.8  Drive-Strength Adjustment
      9. 7.3.9  Temperature-Sensing Output
      10. 7.3.10 Ideal-Diode Mode Operation
        1. 7.3.10.1 Overtemperature-Shutdown Ideal-Diode Mode
    4. 7.4 Start-Up Sequence
    5. 7.5 Safe Operation Area (SOA)
      1. 7.5.1 Repetitive SOA
    6. 7.6 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Slew Rate Selection
          1. 8.2.2.1.1 Start-Up and Slew Rate With Bootstrap High-Side Supply
        2. 8.2.2.2 Signal Level-Shifting
        3. 8.2.2.3 Buck-Boost Converter Design
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Using an Isolated Power Supply
      2. 8.4.2 Using a Bootstrap Diode
        1. 8.4.2.1 Diode Selection
        2. 8.4.2.2 Managing the Bootstrap Voltage
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Solder-Joint Reliability
        2. 8.5.1.2 Power-Loop Inductance
        3. 8.5.1.3 Signal-Ground Connection
        4. 8.5.1.4 Bypass Capacitors
        5. 8.5.1.5 Switch-Node Capacitance
        6. 8.5.1.6 Signal Integrity
        7. 8.5.1.7 High-Voltage Spacing
        8. 8.5.1.8 Thermal Recommendations
      2. 8.5.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 Export Control Notice
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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発注情報

7.3.7.1 Overcurrent Protection and Short-Circuit Protection

There are two types of current faults which can be detected by the driver: overcurrent fault and short-circuit fault.

The overcurrent protection (OCP) circuit monitors drain current and compares that current signal with an internally set limit IT(OC). Upon detection of the overcurrent, the LMG3522R030-Q1 conducts cycle-by-cycle overcurrent protection as shown in Figure 7-4. In this mode, the GaN device is shut off and the OC pin is pulled low when the drain current crosses the IT(OC) plus a delay toff(OC), but the overcurrent signal clears after the IN pin signal goes low. In the next cycle, the GaN device can turn on as normal. The cycle-by-cycle function can be used in cases where steady-state operation current is below the OCP level but transient response can still reach current limit, while the circuit operation cannot be paused. The cycle-by-cycle function also prevents the GaN device from overheating by overcurrent induced conduction losses.

The short-circuit protection (SCP) monitors the drain current and triggers if the di/dt of the current exceeds a threshold di/dtT(SC) as the current crosses between the OC and SC thresholds. It performs this di/dt detection by delaying the OC detection signal by an amount tOC,window and using a higher current SC detection threshold. If the delayed OC occurs before the non-delayed SC, the di/dt is below the threshold and an OC is triggered. If the SC is detected first, the di/dt is fast enough and the SC is detected as shown in Figure 7-5. This extremely high di/dt current would typically be caused by a short of the output of the half-bridge and can be damaging for the GaN to continue to operate in that condition. Therefore, if a short-circuit fault is detected, the GaN device is turned off with an intentionally slowed driver so that a lower overshoot voltage and ringing can be achieved during the turn-off event. This fast response circuit helps protect the GaN device even under a hard short-circuit condition. In this protection, the GaN device is shut off and held off until the fault is reset by either holding the IN pin low for a period of time defined in the Specifications or removing power from VDD.

During OCP or SCP in a half bridge, after the current reaches the upper limit and the device is turned off by protection, the PWM input of the device could still be high and the PWM input of the complementary device could still be low. In this case, the load current can flow through the third quadrant of the complementary device with no synchronous rectification. The high negative VDS of the GaN device (–3 V to –5 V) from drain to source could lead to high third-quadrant loss, similar to dead-time loss but for a longer time.

For safety considerations, OCP allows cycle-by-cycle operation while SCP latches the device until reset. By reading the FAULT and OC pins, the exact current fault type can be determined. Refer to Fault Reporting for detailed information.

GUID-20201021-CA0I-GQM5-M99W-DHLQ1HKKL8XJ-low.svg Figure 7-4 Cycle-by-Cycle OCP Operation
GUID-20220503-SS0I-N8B4-T4QC-PJZ2MGNVZXKJ-low.svg Figure 7-5 Overcurrent Detection vs Short-Circuit Detection