JAJSR62
September 2023
LMG3522R050
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
7.1
Switching Parameters
7.1.1
Turn-On Times
7.1.2
Turn-Off Times
7.1.3
Drain-Source Turn-On Slew Rate
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
GaN FET Operation Definitions
8.3.2
Direct-Drive GaN Architecture
8.3.3
Drain-Source Voltage Capability
8.3.4
Internal Buck-Boost DC-DC Converter
8.3.5
VDD Bias Supply
8.3.6
Auxiliary LDO
8.3.7
Fault Detection
8.3.7.1
Overcurrent Protection and Short-Circuit Protection
8.3.7.2
Overtemperature Shutdown
8.3.7.3
UVLO Protection
8.3.7.4
Fault Reporting
8.3.8
Drive-Strength Adjustment
8.3.9
Temperature-Sensing Output
8.3.10
Ideal-Diode Mode Operation
8.3.10.1
Overtemperature-Shutdown Ideal-Diode Mode
8.4
Start-Up Sequence
8.5
Safe Operation Area (SOA)
8.5.1
Repetitive SOA
8.6
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Slew Rate Selection
9.2.2.1.1
Start-Up and Slew Rate With Bootstrap High-Side Supply
9.2.2.2
Signal Level-Shifting
9.2.2.3
Buck-Boost Converter Design
9.2.3
Application Curves
9.3
Do's and Don'ts
9.4
Power Supply Recommendations
9.4.1
Using an Isolated Power Supply
9.4.2
Using a Bootstrap Diode
9.4.2.1
Diode Selection
9.4.2.2
Managing the Bootstrap Voltage
9.5
Layout
9.5.1
Layout Guidelines
9.5.1.1
Solder-Joint Reliability
9.5.1.2
Power-Loop Inductance
9.5.1.3
Signal-Ground Connection
9.5.1.4
Bypass Capacitors
9.5.1.5
Switch-Node Capacitance
9.5.1.6
Signal Integrity
9.5.1.7
High-Voltage Spacing
9.5.1.8
Thermal Recommendations
9.5.2
Layout Examples
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
Export Control Notice
10.7
用語集
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RQS|52
MPQF571F
サーマルパッド・メカニカル・データ
RQS|52
QFND671A
発注情報
jajsr62_oa
6.7
Typical Characteristics
Figure 6-1
Drain-Current Turn-On Delay Time vs Drive-Strength Resistance
Figure 6-3
Turn-On Rise Time vs Drive-Strength Resistance
Figure 6-5
Drain Current vs Drain-Source Voltage
Figure 6-7
Normalized On-Resistance vs Junction Temperature
VDD = 12 V
T
J
= 25 °C
Figure 6-9
VDD Supply Current vs IN Switching Frequency
Figure 6-11
Repetitive Safe Operation Area
Figure 6-2
Turn-On Delay Time vs Drive-Strength Resistance
Figure 6-4
Turn-On Slew Rate vs Drive-Strength Resistance
IN = 0 V
Figure 6-6
Off-State Source-Drain Voltage vs Source Current
Figure 6-8
Output Capacitance vs Drain-Source Voltage
VDD = 12 V
T
J
= 125 °C
Figure 6-10
VDD Supply Current vs IN Switching Frequency