The successful use of GaN devices in general, and LMG3526R050 in particular, depends on proper use of the device. When using the LMG3526R050, DO:

• Read and fully understand the data sheet, including the application notes and layout recommendations.
• Use a four-layer board and place the return power path on an inner layer to minimize power-loop inductance.
• Use small, surface-mount bypass and bus capacitors to minimize parasitic inductance.
• Use the proper size decoupling capacitors and locate them close to the IC as described in Layout Guidelines.
• Use a signal isolator to supply the input signal for the low-side device. If not, ensure the signal source is connected to the signal GND plane which is tied to the power source only at the LMG3526R050 IC.
• Use the FAULT pin to determine power-up state and to detect overcurrent and overtemperature events and safely shut off the converter.

To avoid issues in your system when using the LMG3526R050, DON'T:

• Use a single-layer or two-layer PCB for the LMG3526R050 as the power-loop and bypass capacitor inductances is excessive and prevent proper operation of the IC.
• Reduce the bypass capacitor values below the recommended values.
• Allow the device to experience drain transients above 600 V as they can damage the device.
• Allow significant third-quadrant conduction when the device is OFF or unpowered, which can cause overheating. Self-protection features cannot protect the device in this mode of operation.
• Ignore the FAULT pin output.