JAJSRA3A September   2023  – November 2023 LMG3626

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 GaN Power FET Switching Capability
      2. 7.3.2 Turn-On Slew-Rate Control
      3. 7.3.3 Current-Sense Emulation
      4. 7.3.4 Input Control Pins (EN, IN)
      5. 7.3.5 AUX Supply Pin
        1. 7.3.5.1 AUX Power-On Reset
        2. 7.3.5.2 AUX Under-Voltage Lockout (UVLO)
      6. 7.3.6 Overcurrent Protection
      7. 7.3.7 Overtemperature Protection
      8. 7.3.8 Fault Reporting
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Turn-On Slew-Rate Design
        2. 8.2.2.2 Current-Sense Design
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Solder-Joint Stress Relief
        2. 8.4.1.2 Signal-Ground Connection
        3. 8.4.1.3 CS Pin Signal
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Turn-On Slew-Rate Design

The LMG3626 turn-on slew rates are programmed as discussed in the Turn-On Slew-Rate Control section. The design consideration is the trade-off between power supply efficiency and EMI / transient ringing. Slower turn-on slew-rates lessen EMI and ringing problems but can increase switching losses and vice versa.

In normal quasi-resonant flyback-converter operation, the power switch operates at both ZVS and also non-ZVS valley switching depending on operating conditions. The valley switching occurs at zero transformer current. Therefore, there are no switching cross-over losses in quasi-resonant converters. The only switching loss is the switch-node capacitive loss during valley switching. So the turn-on slew rate has no impact on the converter loss. This seems to indicate to use the slowest turn-on slew rate setting. The turn-on slew rate setting, however, can have a secondary impact on converter loss from the switch turn-on delay.

Depending on how the quasi-resonant controller implements valley switching, the switch turn-on delay can cause the power-converter to switch after the valley and increase capacitive switching losses. Since the switch turn-on delay increases as the turn-on slew rate is decreased, using slower turn-on slew rates can increase power supply losses. If the quasi-resonant controller compensates for switch turn-on delay, then there is no loss penalty for using the slowest turn-on slew rate setting. Otherwise, design optimization between switching noise problems and switching losses must be performed.

The turn-on slew rate is programmed by setting RDRV to the recommended typical programming resistance shown in the Turn-On Slew-Rate Control section.