SNOSDL1 December   2024 LMG3650R035

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  8. Parameter Measurement Information
    1. 7.1 Switching Parameters
      1. 7.1.1 Turn-On Times
      2. 7.1.2 Turn-Off Times
      3. 7.1.3 Drain-Source Turn-On and Turn-off Slew Rate
      4. 7.1.4 Zero-Voltage Detection Times (LMG3656R035 only)
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
      1. 8.2.1 LMG3650R035 Functional Block Diagram
      2. 8.2.2 LMG3651R035 Functional Block Diagram
      3. 8.2.3 LMG3656R035 Functional Block Diagram
      4. 8.2.4 LMG3657R035 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Drive Strength Adjustment
      2. 8.3.2 VDD Supply
      3. 8.3.3 Overcurrent and Short-Circuit Protection
      4. 8.3.4 Overtemperature Protection
      5. 8.3.5 UVLO Protection
      6. 8.3.6 Fault Reporting
      7. 8.3.7 Auxiliary LDO (LMG3651R035 Only)
      8. 8.3.8 Zero-Voltage Detection (ZVD) (LMG3656R035 Only)
      9. 8.3.9 Zero-Current Detection (ZCD) (LMG3657R035 Only)
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Slew Rate Selection
        2. 9.2.2.2 Signal Level-Shifting
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Using an Isolated Power Supply
      2. 9.3.2 Using a Bootstrap Diode
        1. 9.3.2.1 Diode Selection
        2. 9.3.2.2 Managing the Bootstrap Voltage
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • KLA|9
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

The layout of the LMG365xR035 is critical to its performance and functionality. Because the half-bridge configuration is typically used with these GaN devices, layout recommendations are considered with this configuration. A four-layer or higher layer count board is required to reduce the parasitic inductances of the layout to achieve suitable performance. Critical layout guidelines are summarized below, and more details are further elaborated in the following sections.

LMG3650R035 LMG3651R035 LMG3656R035 LMG3657R035 LMG3650R035
                    Typical Schematic With Layout Considerations Figure 9-9 LMG3650R035 Typical Schematic With Layout Considerations
LMG3650R035 LMG3651R035 LMG3656R035 LMG3657R035 LMG3651R035
                    Typical Schematic With Layout Considerations Figure 9-10 LMG3651R035 Typical Schematic With Layout Considerations
LMG3650R035 LMG3651R035 LMG3656R035 LMG3657R035 LMG3656R035
                    or LMG3657R035 Typical Schematic With Layout
                    Considerations Figure 9-11 LMG3656R035 or LMG3657R035 Typical Schematic With Layout Considerations