JAJSVT7 December   2024 LMG5126

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Configuration
      2. 6.3.2 Switching Frequency and Synchronization (SYNCIN)
      3. 6.3.3 Dual Random Spread Spectrum (DRSS)
      4. 6.3.4 Operation Modes (BYPASS, DEM, FPWM)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown State
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Feedback Compensation
    2. 7.2 Typical Application
      1. 7.2.1 Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Determining the Duty Cycle
        2. 7.2.3.2 Timing Resistor RT
        3. 7.2.3.3 Vout Programming
        4. 7.2.3.4 Inductor Selection Lm
        5. 7.2.3.5 Output Capacitor Cout
      4. 7.2.4 Application Curves
        1. 7.2.4.1 Efficiency
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Option Addendum
    2. 10.2 Tape and Reel Information
    3. 10.3 Mechanical Data

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • VBT|22
サーマルパッド・メカニカル・データ

Feedback Compensation

The open-loop response of a boost regulator is defined as the product of modulator transfer function and feedback transfer function. When plotted on a dB scale, the open loop gain is shown as the sum of modulator gain and feedback gain. The modulator transfer function of a current mode boost regulator including a power stage transfer function with an embedded current loop can be simplified as one pole, one zero, and one right-half-plane zero (RHPZ) system.

Modulator transfer function is defined as follows:

Equation 3. v^outv^comp=AM×1+sωZ_ESR1-sωRHPZ1+sωP_LF

where

  • Modulator DC gain A M = R o u t × D ' 2 × A c s × R c s _ e q
  • Load pole ω P _ L F = 2 R o u t × C o u t
  • ESR zero ω Z _ E S R = 1 R E S R × C o u t
  • RHPZ ω R H P Z = R o u t × D ' 2 L m _ e q
  • The equivalent load resistance R o u t = V o u t 2 P o u t _ t o t a l
  • The equivalent inductance L m _ e q = L m N p
  • The equivalent current sense resistor R c s _ e q = R c s N p
  • Np is the number of the phases.

If the equivalent series resistance (ESR) of Cout (RESR) is small enough and the RHPZ frequency is far away from the target crossover frequency, the modulator transfer function can be further simplified to a one pole system and the voltage loop can be closed with only two loop compensation components, RCOMP and CCOMP, leaving a single pole response at the crossover frequency. A single pole response at the crossover frequency yields a very stable loop with 90 degrees of phase margin.

As shown in Figure 7-1, a gm amplifier is utilized as the output voltage error amplifier. The feedback transfer function includes the feedback resistor divider gain and loop compensation of the error amplifier. RCOMP, CCOMP, and CHF configure the error amplifier gain and phase characteristics, create a pole at origin, a low frequency zero and a high frequency pole.

LMG5126 Type II
            gm amplifier compensation Figure 7-1 Type II gm amplifier compensation

Feedback transfer function is defined as follows:

Equation 4. -v^compv^out=AVM×ωZ_EAs×1+sωZ_EA1+sωP_EA

where

  • The middle-band voltage gain A V M = K F B × g m × R C O M P
  • The feedback resistor divider gain K F B = R F B B R F B T + R F B B . K F B = 1 30 for the internal feedback resistor divider.
  • Low frequency zero ω Z _ E A = 1 R C O M P × C C O M P
  • High frequency pole ω P _ E A 1 R C O M P × C H F

The pole at the origin minimizes the output steady state error. Place the low frequency zero to cancel the load pole of the modulator. The high frequency pole can be used to cancel the zero created by the output capacitor ESR or to decrease noise susceptibility of the error amplifier. By placing the low frequency zero an order of magnitude less than the crossover frequency, the maximum amount of phase boost can be achieved at the crossover frequency. The high frequency pole should be placed beyond the crossover frequency since the addition of CHF adds a pole in the feedback transfer function.

The crossover frequency (open loop bandwidth) is usually limited to one fifth of the RHPZ frequency.

For higher crossover frequency, RCOMP can be increased, while proportionally decreasing CCOMP. Conversely, decreasing RCOMP while proportionally increasing CCOMP, results in lower bandwidth while keeping the same zero frequency in the feedback transfer function.