The LMH0387 3 Gbps HD/SD SDI Configurable I/O Adaptive Cable Equalizer / Cable Driver provides a single chip interface to a BNC. The device can be configured either in the input mode as an equalizer to receive data over coaxial cable or in the output mode as a cable driver to transmit data over coaxial cable. The same I/O pin is used both for the input and the output functions of the device, allowing the system designer the flexibility to use a BNC attached to the device as either an input or an output.
The device operates over a wide range of data rates from 125 Mbps to 2.97 Gbps (DC to 2.97 Gbps when driving cable) and supports ST 424, ST 292, ST 344, and ST 259. The return loss network is integrated within the device so no external components are required to meet the SMPTE return loss specification. The LMH0387 offers designers flexibility in system design and quicker time to market.
In the input mode, the LMH0387 features include a power-saving sleep mode, programmable output common mode voltage and swing, cable length indication, launch amplitude optimization, input signal detection, and an SPI interface. In the output mode, the LMH0387 features include two selectable slew rates for ST 424 / 292 and ST 259 compliance, and output driver power-down control.
The device is available in a 7-mm × 7-mm 48-pin laminate Thin Laminate Grid Array (TLGA) Package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LMH0387 | TLGA (48) | 7.00 mm × 7.00 mm |
Changes from G Revision (April 2013) to H Revision
Changes from F Revision (April 2013) to G Revision
PIN | I/O, TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AEC+, AEC- | 20, 21 | I/O, Analog | AEC loop filter external capacitor for equalizer (1 µF connected between AEC+ and AEC-). |
BNC_IO | 8 | I/O, Analog | Serial digital interface input or output for connection to a BNC. Connect this pin to the BNC through an AC coupling capacitor (nominally 4.7 μF). |
CD | 22 | O, LVCMOS | Carrier detect for BNC_IO pin. H = No input signal detected on BNC_IO pin. L = Input signal detected on BNC_IO pin. |
CDTHRESH | 23 | I, Analog | Carrier detect threshold input. Sets the threshold for CD. CDTHRESH may be either unconnected or connected to ground for normal CD operation. |
MISO (SPI) | 29 | O, LVCMOS | SPI Master Input / Slave Output. LMH0387 control data transmit. |
MOSI (SPI) | 39 | I, LVCMOS | SPI Master Output / Slave Input. LMH0387 control data receive. |
RREF | 36 | I, Analog | BNC_IO output driver level control. Connect a resistor (nominally 715 Ω) to VCC to set the output voltage swing for the BNC_IO pin. |
RSVD | 1, 4-7, 9–16, 42, 46-48 | N/A | Do not connect. |
SCK (SPI) | 38 | I, LVCMOS | SPI serial clock input. |
SD/HD | 44 | I, LVCMOS | BNC_IO output slew rate control. SD/HD has an internal pulldown. H = BNC_IO output rise/fall time complies with SMPTE 259M (SD). L = BNC_IO output rise/fall time complies with SMPTE 424M / 292M (3G/HD). |
SDI, SDI | 33, 34 | I, Analog | Serial data differential input for transmitter (cable driver). |
SDO, SDO | 27, 28 | O, LVDS | Serial data differential output from receiver (equalizer). |
SPI_EN | 18 | I, LVCMOS | SPI register access enable (equalizer). This pin should always be high; it must be pulled high while operating in the input mode and may optionally be pulled high while operating in the output mode. This pin has an internal pulldown. |
SS (SPI) | 26 | I, LVCMOS | SPI slave select. This pin has an internal pullup. |
TERMRX | 17 | I, Analog | Termination for unused receiver (equalizer) input. This network should consist of a 1-µF capacitor followed by a 220-Ω resistor to ground. |
TERMTX | 45 | O, Analog | Termination for unused transmitter (cable driver) output. This network should consist of a 4.7-µF capacitor followed by a 75-Ω resistor to ground. |
TX_EN | 40 | I, LVCMOS | Transmitter output driver enable. TX_EN has an internal pullup. H = BNC_IO output driver is enabled. L = BNC_IO output driver is powered off. To configure the LMH0387 as a receiver, the BNC_IO output driver must be disabled by tying TX_EN low. To configure the LMH0387 as a transmitter, the output driver must be enabled by tying TX_EN high and the receiver may be powered down using the sleep mode setting through the SPI. |
VCCTX | 2, 3, 43 | Power | Positive power supply for transmitter (3.3 V). |
VEE | 19, 24, 25, 31, 32, 35, 37, 41 | Power | Negative power supply (ground). |
VCCRX | 30 | Power | Positive power supply for receiver (3.3 V). |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Supply Voltage | 4 | V | ||
Input Voltage (all inputs) | −0.3 | VCC+0.3 | V | |
Junction Temperature | 125 | °C | ||
Storage Temperature | −65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±6000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±2500 | |||
Machine model | ±300 |
MIN | NOM | MAX | UNIT | |
---|---|---|---|---|
Supply Voltage (VCC – VEE) | 3.14 | 3.3 | 3.46 | V |
BNC_IO Input / Output Coupling Capacitance | 4.7 | µF | ||
AEC Capacitor (Connected between AEC+ and AEC-) | 1 | µF | ||
Operating Free Air Temperature (TA) | −40 | 85 | °C |
THERMAL METRIC(1) | LMH0387 | UNIT | |
---|---|---|---|
NPD (TLGA) | |||
48 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 64.5 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 20.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 32.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 32 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VIH | Input Voltage High Level | 2 | VCC | V | ||
VIL | Input Voltage Low Level | VEE | 0.8 | V | ||
VOH | Output Voltage High Level | IOH = –2 mA | 2.4 | V | ||
VOL | Output Voltage Low Level | IOL = 2 mA | 0.4 | V |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VIN | Input Voltage Swing | 0-m cable length(4) | 720 | 800 | 950 | mVP−P |
VSSP-P | Differential Output Voltage, P-P | 100-Ω load, default register settings, Figure 1(5) | 500 | 700 | 900 | mVP-P |
VOD | Differential Output Voltage | 250 | 350 | 450 | mV | |
ΔVOD | Change in Magnitude of VOD for complementary Output States | 50 | mV | |||
VOS | Offset Voltage | 1.125 | 1.25 | 1.375 | V | |
ΔVOS | Change in Magnitude of VOS for complementary Output States | 50 | mV | |||
IOS | Output Short Circuit Current | 30 | mA | |||
CDTHRESH | CDTHRESH DC Voltage (floating) | 1.3 | V | |||
CDTHRNG | CDTHRESH Range | 0.8 | V | |||
ICC | Supply Current | Equalizing cable > 120 m (Belden 1694A), TX_EN = 0 |
91 | 113 | mA | |
Equalizing cable ≤ 120 m (Belden 1694A), TX_EN = 0(6) |
71 | mA | ||||
Power save mode (equalizer in sleep mode, TX_EN = 0) | 11 | mA |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VCMOUT | BNC_IO Output Common Mode Voltage | VCC – VOUT | V | |||
VOUT | BNC_IO Output Voltage Swing | RREF = 715 Ω ±1% | 720 | 800 | 880 | mVP-P |
VCMIN | SDI, SDI Input Common Mode Voltage | 0.9 + VID/2 | VCC – VID/2 | V | ||
VID | SDI, SDI Input Voltage Swing | Differential | 100 | 2200 | mVP-P | |
ICC | Supply Current | SD/HD = 0, equalizer in sleep mode | 57 | 71 | mA | |
SD/HD = 1, equalizer in sleep mode | 50 | mA | ||||
Power save mode (TX_EN = 0, equalizer in sleep mode) | 11 | mA | ||||
Loopback mode (Tx and Rx both enabled), SD/HD = 0 | 117 | mA |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
DRMIN | Minimum Input Data Rate | 125 | Mbps | |||
DRMAX | Maximum Input Data Rate | 2970 | Mbps | |||
tjit | Equalizer Jitter for Various Cable Lengths (SDO, SDO) | 2.97 Gbps, Belden 1694A, 0-100 meters(7)(8) |
0.3 | UI | ||
2.97 Gbps, Belden 1694A, 100-120 meters(8) |
0.35 | UI | ||||
1.485 Gbps, Belden 1694A, 0-170 meters(7)(8) |
0.25 | UI | ||||
1.485 Gbps, Belden 1694A, 170-200 meters(8) |
0.3 | UI | ||||
270 Mbps, Belden 1694A, 0-350 meters(7)(8) |
0.2 | UI | ||||
270 Mbps, Belden 1694A, 350-400 meters(8) |
0.2 | UI | ||||
tr, tf | Output Rise Time, Fall Time | 20% – 80%, 100 Ω load, Figure 1(3) | 80 | 130 | ps | |
Δtr, Δtf | Mismatch in Rise/Fall Time(3) | . | 2 | 15 | ps | |
tOS | Output Overshoot(3) | 1% | 5% | |||
RLIN | BNC_IO Return Loss | 5 MHz - 1.5 GHz(3)(9) | 15 | dB | ||
1.5 GHz - 3 GHz(3)(9) | 10 | dB |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
DRMAX | Maximum Input Data Rate | 2970 | Mbps | |||
tjit | Additive Jitter | 2.97 Gbps(10) | 20 | psP-P | ||
1.485 Gbps(10) | 18 | psP-P | ||||
270 Mbps(10) | 15 | psP-P | ||||
tr, tf | Output Rise Time, Fall Time | SD/HD = 0, 20% – 80% | 65 | 130 | ps | |
SD/HD = 1, 20% – 80% | 400 | 800 | ps | |||
Δtr, Δtf | Mismatch in Rise/Fall Time | SD/HD = 0 | 30 | ps | ||
SD/HD = 1 | 50 | ps | ||||
Duty Cycle Distortion | SD/HD = 0(3) | 30 | ps | |||
SD/HD = 1(3) | 100 | ps | ||||
tOS | Output Overshoot | SD/HD = 0(3) | 10% | |||
SD/HD = 1(3) | 8% | |||||
RLOUT | BNC_IO Output Return Loss | 5 MHz - 1.5 GHz(3)(9) | 15 | dB | ||
1.5 GHz - 3 GHz(3)(9) | 10 | dB |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
fSCK | SCK Frequency | 20 | MHz | |||
tPH | SCK Pulse Width High | Figure 2, Figure 3 | 40% | SCK period | ||
tPL | SCK Pulse Width Low | 40% | SCK period | |||
tSU | MOSI Setup Time | Figure 2, Figure 3 | 4 | ns | ||
tH | MOSI Hold Time | 4 | ns | |||
tSSSU | SS Setup Time | Figure 2, Figure 3 | 4 | ns | ||
tSSH | SS Hold Time | 4 | ns | |||
tSSOF | SS Off Time | 10 | ns | |||
tODZ | MISO Driven-to-Tristate Time | Figure 3 | 15 | ns | ||
tOZD | MISO Tristate-to-Driven Time | 15 | ns | |||
tOD | MISO Output Delay Time | 15 | ns |
120m 0f B1694A at 2.97 Gbps, PRBS10 H: 100 ps / div, V: 50 mV / div (SDO Output Shown) |
H: 62.5 ps / div, V: 100 mV / div (BNC_IO Output Shown) | ||