SNLS312M August   2010  – July 2015 LMH0394

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 AC Electrical Characteristics
    7. 6.7 SPI Interface AC Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Block Description
      2. 7.3.2 Mute Reference (MuteREF)
      3. 7.3.3 Carrier Detect (CD) and Mute
      4. 7.3.4 Input Interfacing
      5. 7.3.5 Output Interfacing
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto Sleep
    5. 7.5 Programming
      1. 7.5.1 SPI Register Access
        1. 7.5.1.1  SPI Transaction Overview
        2. 7.5.1.2  SPI Write
        3. 7.5.1.3  SPI Read
        4. 7.5.1.4  SPI Daisy-Chain Operation
        5. 7.5.1.5  SPI Daisy-Chain Write
        6. 7.5.1.6  SPI Daisy-Chain Read
        7. 7.5.1.7  SPI Daisy-Chain Read and Write Example
        8. 7.5.1.8  SPI Daisy-Chain Length Detection
        9. 7.5.1.9  Output Driver Adjustments and De-emphasis Setting
        10. 7.5.1.10 Launch Amplitude Optimization
        11. 7.5.1.11 Cable Length Indicator (CLI)
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Interfacing to 3.3-V SPI
      2. 8.1.2 Crosstalk Immunity
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Dont's
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

RUM Package
16-Pin WQFN (Non-SPI)
Top View
LMH0394 30101503.gif

Pin Functions – Pin Mode (non-SPI) / SPI_EN = GND / LMH0344 Compatible

PIN I/O, TYPE DESCRIPTION
NO. NAME
1 VEE Ground Negative power supply (ground).
2 SDI I, Analog Serial data true input.
3 SDI I, Analog Serial data complement input.
4 SPI_EN I, LVCMOS SPI register access enable. This pin has an internal pulldown.
H = SPI register access mode.
L = Pin mode.
5 AEC+ I/O, Analog AEC loop filter external capacitor (1-µF) positive connection (capacitor is optional).
6 AEC- I/O, Analog AEC loop filter external capacitor (1-µF) negative connection (capacitor is optional).
7 BYPASS I, LVCMOS Equalization bypass. This pin has an internal pull-down.
H = Equalization is bypassed (no equalization occurs).
L = Normal operation.
8 MUTEREF I, Analog Mute reference input. Sets the threshold for CD and (with CD tied to MUTE) determines the maximum cable to be equalized before muting. MUTEREF may be either unconnected or connected to ground for normal CD operation.
9 VEE I, LVCMOS Connect this pin to ground or drive it logic low.
10 SDO O, LVDS Serial data complement output.
11 SDO O, LVDS Serial data true output.
12 AUTO SLEEP I, LVCMOS Auto Sleep. AUTO SLEEP has precedence over MUTE and BYPASS. This pin has an internal pullup.
H = Device will power down when no input is detected.
L = Normal operation (device will not enter auto power down).
13 VCC Power Positive power supply (+2.5 V).
14 MUTE I, LVCMOS Output mute. CD may be tied to this pin to inhibit the output when no input signal is present. MUTE has precedence over BYPASS. This pin has an internal pull-down.
H = Outputs forced to a muted state.
L = Outputs enabled.
15 CD O, LVCMOS Carrier detect.
H = No input signal detected.
L = Input signal detected.
16 VCC Power Positive power supply (2.5 V).
DAP VEE Ground Connect exposed DAP to negative power supply (ground). See Figure 22 for layout example.
RUM Package
16-Pin WQFN (SPI)
Top View
LMH0394 30101507.gif

Pin Functions – SPI Mode / SPI_EN = VCC

PIN I/O, TYPE DESCRIPTION
NO. NAME
1 VEE Ground Negative power supply (ground).
2 SDI I, Analog Serial data true input.
3 SDI I, Analog Serial data complement input.
4 SPI_EN I, LVCMOS SPI register access enable. This pin has an internal pull-down.
H = SPI register access mode.
L = Pin mode.
5 AEC+ I/O, Analog AEC loop filter external capacitor (1 µF) positive connection (capacitor is optional).
6 AEC- I/O, Analog AEC loop filter external capacitor (1 µF) negative connection (capacitor is optional).
7 CD O, LVCMOS Carrier detect.
H = No input signal detected.
L = Input signal detected.
8 MUTEREF I, Analog Mute reference input. Sets the threshold for CD and (with CD tied to MUTE) determines the maximum cable to be equalized before muting. MUTEREF may be either unconnected or connected to ground for normal CD operation.
9 SS (SPI) I, LVCMOS SPI slave select. This pin has an internal pullup.
10 SDO O, LVDS Serial data complement output.
11 SDO O, LVDS Serial data true output.
12 MISO (SPI) O, LVCMOS SPI Master Input / Slave Output. LMH0394 control data transmit.
13 VCC Power Positive power supply (2.5 V).
14 SCK (SPI) I, LVCMOS SPI serial clock input.
15 MOSI (SPI) I, LVCMOS SPI Master Output / Slave Input. LMH0394 control data receive. This pin has an internal pulldown.
16 VCC Power Positive power supply (2.5 V).
DAP VEE Ground Connect exposed DAP to negative power supply (ground). See Figure 22 for layout example.