SNOSAX9J April   2007  – April 2016 LMH6552

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: ±5 V
    6. 6.6 Electrical Characteristics: ±2.5 V
    7. 6.7 Typical Characteristics V+ = +5 V, V− = −5 V
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Fully Differential Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 WSON Package
          2. 8.2.1.2.2 Fully Differential Operation
          3. 8.2.1.2.3 Driving Capacitive Loads
            1. 8.2.1.2.3.1 Balanced Cable Driver
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Single-Ended Input to Differential Output Operation
      3. 8.2.3 Single Supply Operation
      4. 8.2.4 Split Supply Operation
      5. 8.2.5 Output Noise Performance and Measurement
      6. 8.2.6 Driving Analog to Digital Converters
  9. Power Supply Recommendations
    1. 9.1 Power Supply Bypassing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
    5. 10.5 ESD Protection
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
        1. 11.2.1.1 Evaluation Board
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The proprietary current feedback architecture of the LMH6552 offers gain and bandwidth independence with exceptional gain flatness and noise performance, even at high values of gain, simply with the appropriate choice of RF1 and RF2. Generally RF1 is set equal to RF2, and RG1 equal to RG2, so that the gain is set by the ratio RF/RG. Matching of these resistors greatly affects CMRR, DC offset error, and output balance. A minimum of 0.1% tolerance resistors are recommended for optimal performance, and the amplifier is internally compensated to operate with optimum gain flatness with values of RF between 270 Ω and 390 Ω depending on package selection, PCB layout, and load resistance.

The output common mode voltage is set by the VCM pin with a fixed gain of 1 V/V. This pin must be driven by a low impedance reference and must be bypassed to ground with a 0.1 µF ceramic capacitor. Any unwanted signal coupling into the VCM pin is passed along to the outputs, reducing the performance of the amplifier. This pin must not be left floating.

The LMH6552 can be operated on a supply range as either a single 5V supply or as a split +5 V and −5 V. Operation on a single 5-V supply, depending on gain, is limited by the input common mode range; therefore, AC coupling may be required. For example, in a DC coupled input application on a single 5-V supply, with a VCM of 1.5 V, the input common voltage at a gain of 1 is 0.75 V, which is outside the minimum 1.2-V to 3.8-V input common mode range of the amplifier. The minimum VCM for this application must be greater than 2.5 V depending on output signal swing. Alternatively, AC coupling of the inputs in this example results in equal input and output common mode voltages, so a 1.5 V VCM would be achievable. Split supplies allow much less restricted AC and DC coupled operation with optimum distortion performance.

The LMH6552 is equipped with an ENABLE pin to reduce power consumption when not in use. The ENABLE pin, when not driven, floats high (on). When the ENABLE pin is pulled low the amplifier is disabled and the amplifier output stage goes into a high impedance state so the feedback and gain set resistors determine the output impedance of the circuit. For this reason input to output isolation is poor in the disabled state and the part is not recommended in multiplexed applications where outputs are all tied together.

8.2 Typical Applications

8.2.1 Typical Fully Differential Application

In many applications, it is required to drive a differential input ADC from a single ended source. Traditionally, transformers have been used to provide single to differential conversion, but these are inherently bandpass by nature and cannot be used for DC coupled applications. The LMH6552 provides excellent performance as a single-to-differential converter down to DC. Figure 45 illustrates a typical application circuit where an LMH6552 is used to produce a differential signal from a single ended source.

LMH6552 30003504.gif Figure 39. Typical Fully Differential Application Schematic

8.2.1.1 Design Requirements

One typical application for the LMH6552 is to drive an ADC. The following design is a single ended to differential circuit with an input impedance of 50 Ω and an output impedance of 100 Ω. The VCM voltage of the amplifier needs to be set to the same voltage as the ADC reference voltage which is typically 1.2 V. Figure 45 illustrates the design equations required to set the external resistor values. This design also requires a gain of 1 and -74 dBc THD at 70 MHz.

8.2.1.2 Detailed Design Procedure

To match the input impedance of the circuit in Figure 45 to a specified source resistance, RS, requires that RT || RIN = RS. The equations governing RIN and AV for single-to-differential operation are also provided in Figure 45. These equations, along with the source matching condition, must be solved iteratively to achieve the desired gain with the proper input termination. Component values for several common gain configurations in a 50-Ω environment are given in Table 1. Gain Component Values for 50-Ω System WSON Package. Typically RS=50 Ω and RM=RS||RT.

8.2.1.2.1 WSON Package

Due to its size and lower parasitics, the WSON requires the lower optimum value of 275 Ω for RF. This gives a flat frequency response with minimal peaking. With a lower RF value the WSON package has a reduction in noise compared to the SOIC with its optimum RF = 360 Ω.

8.2.1.2.2 Fully Differential Operation

The LMH6552 performs best in a fully differential configuration. The circuit illustrated in Figure 39 is a typical fully differential application circuit as might be used to drive an analog to digital converter (ADC). In this circuit the closed loop gain AV = VOUT/ VIN = RF/RG, where the feedback is symmetric. The series output resistors, RO, are optional and help keep the amplifier stable when presented with a capacitive load. Refer to Driving Capacitive Loads for details.

When driven from a differential source, the LMH6552 provides low distortion, excellent balance, and common mode rejection. This is true provided the resistors RF, RG and RO are well matched and strict symmetry is observed in board layout. With an intrinsic device CMRR of 80 dB, using 0.1% resistors gives a worst case CMRR of around 60 dB for most circuits.

The circuit configuration illustrated in Figure 40 was used to measure differential S parameters in a 50-Ω environment at a gain of 1 V/V. Refer to Figure 34 and Figure 35 in the Typical Characteristics for measurement results.

LMH6552 30003553.gif Figure 40. Differential S-Parameter Test Circuit

Table 1. Gain Component Values for 50Ω System WSON Package

Gain RF RG RT RM
0 dB 275Ω 255Ω 59Ω 26.7Ω
6 dB 275Ω 127Ω 68.1Ω 28.7Ω
12 dB 275Ω 54.9Ω 107Ω 34Ω
LMH6552 30003554.gif Figure 41. Single Ended Input S-Parameter Test Circuit (50Ω System)

The circuit shown in Figure 41 was used to measure S-parameters for a single-to-differential configuration. Figure 34 and Figure 35 in Typical Characteristics are taken using the recommended component values for 0 dB gain.

8.2.1.2.3 Driving Capacitive Loads

As noted previously, capacitive loads must be isolated from the amplifier output with small valued resistors. This is particularly the case when the load has a resistive component that is 500 Ω or higher. A typical ADC has capacitive components of around 10 pF and the resistive component could be 1000 Ω or higher. If driving a transmission line, such as 50Ω coaxial or 100Ω twisted pair, using matching resistors is sufficient to isolate any subsequent capacitance.

8.2.1.2.3.1 Balanced Cable Driver

With up to 15 VPP differential output voltage swing and 80 mA of linear drive current the LMH6552 makes an excellent cable driver as illustrated in Figure 42. The LMH6552 is also suitable for driving differential cables from a single ended source.

LMH6552 30003502.gif Figure 42. Fully Differential Cable Driver

8.2.1.3 Application Curves

Many application circuits have capacitive loading. As shown in Figure 43 amplifier bandwidth is reduced with increasing capacitive load, so parasitic capacitance must be strictly limited.

In order to ensure stability resistance must be added between the capacitive load and the amplifier output pins. The value of the resistor is dependent on the amount of capacitive load as shown in Figure 44. This resistive value is a suggestion. System testing is required to determine the optimal value. Using a smaller resistor retains more system bandwidth at the expense of overshoot and ringing, and larger values of resistance reduce overshoot but also reduce system bandwidth.

LMH6552 30003521.gif Figure 43. Frequency Response vs Capacitive Load
LMH6552 30003522.gif Figure 44. Suggested ROUT vs Capacitive Load

8.2.2 Single-Ended Input to Differential Output Operation

In many applications, it is required to drive a differential input ADC from a single-ended source. Traditionally, transformers have been used to provide single to differential conversion, but these are inherently bandpass by nature and cannot be used for DC coupled applications. The LMH6552 provides excellent performance as a single-to-differential converter down to DC. Figure 45 shows a typical application circuit where an LMH6552 is used to produce a differential signal from a single-ended source.

LMH6552 30003510.gif Figure 45. Single-Ended Input with Differential Output

When using the LMH6552 in single-to-differential mode, the complementary output is forced to a phase inverted replica of the driven output by the common mode feedback circuit as opposed to being driven by its own complimentary input. Consequently, as the driven input changes, the common mode feedback action results in a varying common mode voltage at the amplifier's inputs, proportional to the driving signal. Due to the non-ideal common mode rejection of the amplifier's input stage, a small common mode signal appears at the outputs which is superimposed on the differential output signal. The ratio of the change in output common mode voltage to output differential voltage is commonly referred to as output balance error. The output balance error response of the LMH6552 over frequency is shown in the Typical Characteristics.

To match the input impedance of the circuit in Figure 45 to a specified source resistance, RS, requires that RT || RIN = RS. The equations governing RIN and AV for single-to-differential operation are also provided in Figure 45. These equations, along with the source matching condition, must be solved iteratively to achieve the desired gain with the proper input termination. Component values for several common gain configurations in a 50-Ω environment are given in Table 1. Typically RS=50Ω and RM=RS||RT.

8.2.3 Single Supply Operation

Single supply operation is possible on supplies from 5 V to 10 V; however, as discussed earlier, AC input coupling is recommended for low supplies such as 5 V due to input common mode limitations. An example of an AC coupled, single supply, single-to-differential circuit is illustrated in Figure 46. Note that when AC coupling, both inputs need to be AC coupled irrespective of single-to-differential or differential-to-differential configuration. For higher supply voltages DC coupling of the inputs may be possible provided that the output common mode DC level is set high enough so that the amplifier's inputs and outputs are within their specified operating ranges.

LMH6552 30003509.gif Figure 46. AC Coupled for Single Supply Operation

8.2.4 Split Supply Operation

For optimum performance, split supply operation is recommended using +5 V and −5 V supplies; however, operation is possible on split supplies as low as +2.25 V and −2.25 V and as high as +6 V and −6 V. Provided the total supply voltage does not exceed the 4.5-V to 12-V operating specification, non-symmetric supply operation is also possible and in some cases advantageous. For example, if a 5-V DC coupled operation is required for low power dissipation but the amplifier input common mode range prevents this operation, it is still possible with split supplies of (V+) and (V). Where (V+) - (V) = 5V and V+ and V are selected to center the amplifier input common mode range to suit the application.

LMH6552 30003505.gif Figure 47. Split Supply

8.2.5 Output Noise Performance and Measurement

Unlike differential amplifiers based on voltage feedback architectures, noise sources internal to the LMH6552 refer to the inputs largely as current sources, hence the low input referred voltage noise and relatively higher input referred current noise. The output noise is therefore more strongly coupled to the value of the feedback resistor and not to the closed loop gain, as would be the case with a voltage feedback differential amplifier. This allows operation of the LMH6552 at much higher gain without incurring a substantial noise performance penalty, simply by choosing a suitable feedback resistor.

Figure 48 shows a circuit configuration used to measure noise figure for the LMH6552 in a 50-Ω system. An RF value of 275 Ω is chosen for the SOIC package to minimize output noise and simultaneously allows both high gain (9 V/V) and proper 50-Ω input termination. Refer to Single-Ended Input to Differential Output Operation for calculation of resistor and gain values. Noise figure values at various frequencies are shown Figure 31 in the Typical Characteristics.

LMH6552 30003550.gif Figure 48. Noise Figure Circuit Configuration

8.2.6 Driving Analog to Digital Converters

Analog-to-digital converters present challenging load conditions. They typically have high impedance inputs with large and often variable capacitive components. As well, there are usually current spikes associated with switched capacitor or sample and hold circuits. Figure 49 shows a combination circuit of the LMH6552 driving the ADC12DL080. The two 125-Ω resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. In addition, the resistors, along with a 2.2-pF capacitor across the outputs (in parallel with the ADC input capacitance), form a low pass anti-aliasing filter with a pole frequency of about 60 MHz. For switched capacitor input ADCs, the input capacitance varies based on the clock cycle, as the ADC switches between the sample and hold mode. See your particular ADC's datasheet for details.

LMH6552 30003505.gif Figure 49. Driving a 12-Bit ADC

Figure 50 illustrates the SFDR and SNR performance vs frequency for the LMH6552 and ADC12DL080 combination circuit with the ADC input signal level at −1 dBFS. The ADC12DL080 is a dual 12-bit ADC with maximum sampling rate of 80 MSPS. The amplifier is configured to provide a gain of 2 V/V in single to differential mode. An external band-pass filter is inserted in series between the input signal source and the amplifier to reduce harmonics and noise from the signal generator. In order to properly match the input impedance seen at the LMH6552 amplifier inputs, RM is chosen to match ZS || RT for proper input balance.

LMH6552 30003540.gif Figure 50. LMH6552/ADC12DL080 SFDR and SNR Performance vs. Frequency

Figure 51 shows a combination circuit of the LMH6552 driving the ADC14DS105. The ADC14DS105 is a dual channel 14-bit ADC with a sampling rate of 105 MSPS. The circuit in Figure 51 has a 2nd order low-pass LC filter formed by the 620 nH inductor along with the 22-pF capacitor across the differential outputs of the LMH6552. The filter has a pole frequency of about 50 MHz. Figure 52 shows the combined SFDR and SNR performance over frequency with a −1 dBFs input signal and a sampling rate of 1000 MSPS.

LMH6552 30003566.gif Figure 51. Driving a 14-bit ADC

The amplifier is configured to provide a gain of 2 V/V in a single-to-differential mode. The LMH6552 common mode voltage is set by the ADC14DS105. Circuit testing is the same as described for the LMH6552 and ADC12DL080 combination circuit. The 0.1-µF capacitor, in series with the 49.9-Ω resistor, is inserted to ground across the 68.1Ω-resistor to balance the amplifier inputs.

LMH6552 30003568.gif Figure 52. LMH6552/ADC14DS105 SFDR and SNR Performance vs. Frequency

The amplifier and ADC must be located as close as possible. Both devices require that the filter components be in close proximity to them. The amplifier needs to have minimal parasitic loading on the output traces and the ADC is sensitive to high frequency noise that may couple in on its input lines. Some high performance ADCs have an input stage that has a bandwidth of several times its sample rate. The sampling process results in all input signals presented to the input stage mixing down into the first Nyquist zone (DC to Fs/2).

The LMH6552 is capable of driving a variety of Texas Instruments Analog-to-Digital Converters. This is shown in Table 2, which offers a list of possible signal path ADC and amplifier combinations. The use of the LMH6552 to drive an ADC is determined by the application and the desired sampling process (Nyquist operation, sub-sampling or over-sampling). See application note AN-236 for more details on the sampling processes and application note AN-1393 'Using High Speed Differential Amplifiers to Drive ADCs. For more information regarding a particular ADC, refer to the particular ADC datasheet for details.

Table 2. Differential Input ADCs Compatible With LMH6552 Driver

Product Number Max Sampling Rate (MSPS) Resolution Channels
ADC1173 15 8 SINGLE
ADC1175 20 8 SINGLE
ADC08351 42 8 SINGLE
ADC1175-50 50 8 SINGLE
ADC08060 60 8 SINGLE
ADC08L060 60 8 SINGLE
ADC08100 100 8 SINGLE
ADC08200 200 8 SINGLE
ADC08500 500 8 SINGLE
ADC081000 1000 8 SINGLE
ADC08D1000 1000 8 DUAL
ADC10321 20 10 SINGLE
ADC10D020 20 10 DUAL
ADC10030 27 10 SINGLE
ADC10040 40 10 DUAL
ADC10065 65 10 SINGLE
ADC10DL065 65 10 DUAL
ADC10080 80 10 SINGLE
ADC11DL066 66 11 DUAL
ADC11L066 66 11 SINGLE
ADC11C125 125 11 SINGLE
ADC11C170 170 11 SINGLE
ADC12010 10 12 SINGLE
ADC12020 20 12 SINGLE
ADC12040 40 12 SINGLE
ADC12D040 40 12 DUAL
ADC12DL040 40 12 DUAL
ADC12DL065 65 12 DUAL
ADC12DL066 66 12 DUAL
ADC12L063 63 12 SINGLE
ADC12C080 80 12 SINGLE
ADC12DS080 80 12 DUAL
ADC12L080 80 12 SINGLE
ADC12C105 105 12 SINGLE
ADC12DS105 105 12 DUAL
ADC12C170 170 12 SINGLE
ADC14L020 20 14 SINGLE
ADC14L040 40 14 SINGLE
ADC14C080 80 14 SINGLE
ADC14DS080 80 14 DUAL
ADC14C105 105 14 SINGLE
ADC14DS105 105 14 DUAL
ADC14155 155 14 SINGLE