SNOSA35 Data sheet

SNOSA35G August 2002 – July 2015 LMH6657 , LMH6658

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

D|8
- MSOI002K
DGK|8
- MPDS028E

サーマルパッド・メカニカル・データ

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
V_INDifferential			±2.5	V
Output Short Circuit Duration			See ⁽²⁾⁽⁴⁾
Input Current			±10	mA
Supply Voltage (V⁺ - V⁻)			12.6	V
Voltage at Input/Output pins		V⁻ − 0.8	V⁺ + 0.8	V
Soldering Information	Infrared or Convection (20 sec.)		260	°C
Soldering Information	Wave Soldering (10 sec.)		260	°C
Storage temperature, T_stg		–65	100	°C
Junction Temperature⁽³⁾			150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.

(3) The maximum power dissipation is a function of T_J(MAX), R_θJA, and T_A. The maximum allowable power dissipation at any ambient temperature is P_D = (T_J(MAX) - T_A)/ R_θJA . All numbers apply for packages soldered directly onto a PCB.

(4) Output short circuit duration is infinite for V_S < 6 V at room temperature and below. For V_S > 6 V, allowable short circuit duration is 1.5ms.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾⁽³⁾	±2000	V
V_(ESD)	Electrostatic discharge	Machine Model⁽²⁾	±200	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.

(2) Machine Model, 0 Ω in series with 200 pF.

(3) Human body model, 1.5 kΩ in series with 100 pF.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
Supply Voltage (V⁺ – V⁻)		3	12	V
Operating Temperature⁽²⁾		−40	85	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LMH6657		LMH6658		UNIT
		DBV (SOT-23)	DCK (SC70)	D (SOIC)	DGK (VSSOP)
		5 PINS		8 PINS
R_θJA	Junction-to-ambient thermal resistance⁽²⁾	265	478	190	235	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

(2) The maximum power dissipation is a function of T_J(MAX), R_θJA, and T_A. The maximum allowable power dissipation at any ambient temperature is P_D = (T_J(MAX) - T_A)/ R_θJA . All numbers apply for packages soldered directly onto a PCB.

6.5 Electrical Characteristics, 5 V

Unless otherwise specified, all limits ensured for at T_J = 25°C, V⁺ = 5 V, V⁻ = 0 V, V_CM = V_O = V⁺/2, and R_L = 100Ω (or as specified) tied to V⁺/2.

PARAMETER		TEST CONDITIONS		MIN⁽¹⁾	TYP⁽²⁾	MAX⁽¹⁾	UNIT
GB	Gain Bandwidth Product	V_OUT < 200 mV_PP			140		MHz
SSBW	−3-dB BW	A_V = +1, V_OUT = 200 mV_PP		220	270		MHz
SSBW	−3-dB BW	A_V = +2 or −1, V_OUT = 200 mV_PP			100		MHz
GFP	Frequency Response Peaking	A_V = +2, V_OUT = 200 mV_PP, DC to 100 MHz			1.5		dB
GFR	Frequency Response Rolloff	A_V = +2, V_OUT = 200 mV_PP, DC to 100 MHz			0.5		dB
LPD_1°	1° Linear Phase Deviation	A_V = +2, V_OUT = 200 mV_PP, ±1°			30		MHz
GF_0.1dB	0.1-dB Gain Flatness	A_V = +2, ±0.1 dB, V_OUT = 200 mV_PP			13		MHz
PBW	Full Power Bandwidth	−1 dB, V_OUT = 3 V_PP, A_V = −1			55		MHz
DG	Differential Gain	NTSC, V_CM = 2 V, R_L = 150 Ω to V⁺/2, Pos. Video Only			0.03%
DP	Differential Phase	NTSC, V_CM = 2 V, R_L=150 Ω to V⁺/2 Pos. Video Only			0.1		deg
TIME DOMAIN RESPONSE
t_r	Rise and Fall Time	A_V = +2, V_OUT = 500 mV_PP			3.3		ns
t_r	Rise and Fall Time	A_V = −1, V_OUT = 500 mV_PP			3.4		ns
OS	Overshoot, Undershoot	A_V = +2, V_OUT = 500 mV_PP			18%
t_s	Settling Time	V_O = 2 V_PP, ±0.1%, R_L = 500 Ω to V⁺/2, A_V = −1			37		ns
SR	Slew Rate⁽³⁾	A_V = −1, V_O = 3V_PP⁽⁴⁾			470		V/µs
SR	Slew Rate⁽³⁾	A_V = +2, V_O = 3V_PP⁽⁴⁾			420		V/µs
DISTORTION AND NOISE RESPONSE
HD2	2^ndHarmonic Distortion	f = 5MHz, V_O = 2V_PP, A_V = -1			−70		dBc
HD3	3^rd Harmonic Distortion	f = 5MHz, V_O = 2V_PP, A_V = -1			−57		dBc
THD	Total Harmonic Distortion	f = 5MHz, V_O = 2V_PP, A_V = -1			−55.5		dBc
V_n	Input-Referred Voltage Noise	f = 100KHz			11		nV/√Hz
V_n	Input-Referred Voltage Noise	f = 1KHz			19		nV/√Hz
I_n	Input-Referred Current Noise	f = 100KHz			2.1		pA/√Hz
I_n	Input-Referred Current Noise	f = 1KHz			7.5		pA/√Hz
XTLKA	Cross-Talk Rejection (LMH6658)	f = 5MHz, R_L (SND) = 100Ω RCV: R_F = R_G = 1k			69		dB
STATIC, DC PERFORMANCE
A_VOL	Large Signal Voltage Gain	V_O = 1.25V to 3.75V, R_L = 2k to V⁺/2		85	95		dB
		V_O= 1.5V to 3.5V, R_L = 150Ω to V⁺/2		75	85
		V_O = 2V to 3V, R_L = 50Ω to V⁺/2		70	80
CMVR	Input Common-Mode Voltage Range	CMRR ≥ 50dB		−0.2	−0.5		V
			At the temperature extremes	−0.1
				3	3.3
			At the temperature extremes	2.8
V_OS	Input Offset Voltage				±1.1	±5	mV
V_OS	Input Offset Voltage	At the temperature extremes				±7	mV
TC V_OS	Input Offset Voltage Average Drift	See⁽⁶⁾			±2		μV/C
I_B	Input Bias Current	See⁽⁵⁾			−5	−20	μA
I_B	Input Bias Current	See⁽⁵⁾	At the temperature extremes			−30	μA
TC _IB	Input Bias Current Average Drift	See⁽⁶⁾			0.01		nA/°C
I_OS	Input Offset Current				50	300	nA
I_OS	Input Offset Current	At the temperature extremes				500	nA
CMRR	Common-Mode Rejection Ratio	V_CM Stepped from 0V to 3.0V		72	82		dB
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 4.5V to 5.5V, V_CM = 1V		72	82		dB
I_S	Supply Current (per channel)	No load			6.2	8.5	mA
I_S	Supply Current (per channel)	No load	At the temperature extremes			10	mA
MISCELLANEOUS PERFORMANCE
V_OH	Output Swing High	R_L = 2k to V⁺/2		4.1	4.25		V
		R_L = 2k to V⁺/2	At the temperature extremes	3.8
		R_L= 150Ω to V⁺/2		4	4.19
		R_L= 150Ω to V⁺/2	At the temperature extremes	3.7
		R_L = 75Ω to V⁺/2		3.85	4.15
		R_L = 75Ω to V⁺/2	At the temperature extremes	3.5
V_OL	Output Swing Low	R_L = 2k to V⁺/2		900	800		mV
		R_L = 2k to V⁺/2	At the temperature extremes	1100
		R_L = 150Ω to V⁺/2		970	870
		R_L = 150Ω to V⁺/2	At the temperature extremes	1200
		R_L = 75Ω to V⁺/2		990	885
		R_L = 75Ω to V⁺/2	At the temperature extremes	1250
I_OUT	Output Current	V_OUT = 1V from either rail	Sourcing	40	85		mA
I_OUT	Output Current	V_OUT = 1V from either rail	Sinking	–40	105		mA
I_SC	Output Short CircuitCurrent⁽⁷⁾	Sourcing to V⁺/2		100	155		mA
		Sourcing to V⁺/2	At the temperature extremes	80
		Sinking to V⁺/2		100	220
		Sinking to V⁺/2	At the temperature extremes	80
R_IN	Common-Mode Input Resistance				3		MΩ
C_IN	Common-Mode Input Capacitance				1.8		pF
R_OUT	Output Impedance	f = 1MHz, A_V = +1			0.06		Ω

(1) All limits are ensured by testing or statistical analysis.

(2) Typical values represent the most likely parametric norm.

(3) Slew rate is the "worst case" of the rising and falling slew rates.

(4) Output Swing not limited by Slew Rate limit.

(5) Positive current corresponds to current flowing into the device.

(6) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

(7) Short circuit test is a momentary test. See ^{Note 3} under Absolute Maximum Ratings.

6.6 Electrical Characteristics, ±5 V

Unless otherwise specified, all limits ensured for at T_J = 25°C, V⁺ = 5 V, V⁻ = −5 V, V_CM = V_O, and R_L = 100 Ω (or as specified) tied to 0 V.

PARAMETER		TEST CONDITIONS		MIN⁽²⁾	TYP⁽¹⁾	MAX⁽²⁾	UNIT
GB	Gain Bandwidth Product	V_OUT < 200 mV_PP			140		MHz
SSBW	−3-dB BW	A_V = +1, V_OUT = 200 mV_PP		220	270		MHz
SSBW	−3-dB BW	A_V = +2 or −1, V_OUT = 200 mV_PP			100		MHz
GFP	Frequency Response Peaking	A_V = +2, V_OUT = 200 mV_PP, DC to 100 MHz			1		dB
GFR	Frequency Response Rolloff	A_V = +2, V_OUT = 200 mV_PP, DC to 100 MHz			0.9		dB
LPD_1°	1° Linear Phase Deviation	A_V = +2, V_OUT = 200mV_PP, ±1°			30		MHz
GF_0.1dB	0.1-dB Gain Flatness	A_V = +2, ±0.1 dB, V_OUT = 200 mV_PP			20		MHz
PBW	Full Power Bandwidth	−1 dB, V_OUT = 8 V_PP, A_V = −1			30		MHz
DG	Differential Gain	NTSC, R_L = 150 Ω, Pos. or Neg. Video			0.03%
DP	Differential Phase	NTSC,R_L = 150 Ω, Pos. or Neg. Video			0.1		deg
TIME DOMAIN RESPONSE
t_r	Rise and Fall Time	A_V = +2, V_OUT = 500 mV_PP			3.3		ns
t_r	Rise and Fall Time	A_V = −1, V_OUT = 500 mV_PP			3.3		ns
OS	Overshoot, Undershoot	A_V = +2, V_OUT = 500 mV_PP			16%
t_s	Settling Time	V_O = 5 V_PP, ±0.1%, R_L =500 Ω, A_V = −1			35		ns
SR	Slew Rate⁽⁴⁾	A_V = −1, V_O = 8 V_PP			700		V/µs
SR	Slew Rate⁽⁴⁾	A_V = +2, V_O = 8 V_PP			500		V/µs
DISTORTION AND NOISE RESPONSE
HD2	2^ndHarmonic Distortion	f = 5 MHz, V_O = 2 V_PP, A_V = -1			−70		dBc
HD3	3^rd Harmonic Distortion	f = 5 MHz, V_O = 2 V_PP, A_V = -1			−57		dBc
THD	Total Harmonic Distortion	f = 5 MHz, V_O = 2 V_PP, A_V = -1			−55.5		dBc
V_n	Input-Referred Voltage Noise	f = 100 KHz			11		nV/√Hz
V_n	Input-Referred Voltage Noise	f = 1 KHz			19		nV/√Hz
I_n	Input-Referred Current Noise	f = 100 KHz			2.1		pA/√Hz
I_n	Input-Referred Current Noise	f = 1 KHz			7.5		pA/√Hz
XTLKA	Cross-Talk Rejection (LMH6658)	f = 5 MHz, R_L (SND) = 100 Ω RCV: R_F = R_G = 1 k			69		dB
STATIC, DC PERFORMANCE
A_VOL	Large Signal Voltage Gain	V_O = −3.75 V to 3.75 V, R_L = 2 k		87	100		dB
		V_O= −3.5 V to 3.5 V, R_L = 150 Ω		80	90
		V_O = −3 V to 3 V, R_L = 50 Ω		75	85
CMVR	Input Common-Mode Voltage Range	CMRR ≥ 50 dB		−5.2	−5.5		V
			At the temperature extremes	−5.1
				3	3.3
			At the temperature extremes	2.8
V_OS	Input Offset Voltage				±1	±5	mV
V_OS	Input Offset Voltage	Apply at the temperature extremes				±7	mV
TC V_OS	Input Offset Voltage Average Drift	See ⁽⁶⁾			±2		μV/C
I_B	Input Bias Current	See ⁽³⁾			−5	−20	μA
I_B	Input Bias Current	See ⁽³⁾	At the temperature extremes			−30	μA
TC_IB	Input Bias Current Average Drift	See ⁽⁶⁾			0.01		nA/°C
I_OS	Input Offset Current				50	300	nA
I_OS	Input Offset Current	At the temperature extremes				500	nA
CMRR	Common-Mode Rejection Ratio	V_CM Stepped from −5 V to 3 V		75	84		dB
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 4.5 V to 5.5 V, V_CM = −4 V		75	82		dB
−PSRR	Negative Power Supply Rejection Ratio	V⁻ = −4.5 V to −5.5 V		78	85		dB
I_S	Supply Current (per channel)	No load			6.5	9	mA
I_S	Supply Current (per channel)	No load	At the temperature extremes			11	mA
MISCELLANEOUS PERFORMANCE
V_OH	Output Swing High	R_L = 2 k		4.1	4.25		V
		R_L = 2 k	At the temperature extremes	3.8
		R_L = 150 Ω		4	4.2
		R_L = 150 Ω	At the temperature extremes	3.7
		R_L = 75 Ω		3.85	4.18
		R_L = 75 Ω	At the temperature extremes	3.5
V_OL	Output Swing Low	R_L = 2 k		−4.05	−4.19		V
		R_L = 2 k	At the temperature extremes	−3.8
		R_L = 150 Ω		−3.9	−4.05
		R_L = 150 Ω	At the temperature extremes	−3.65
		R_L = 75 Ω		−3.8	−4
		R_L = 75 Ω	At the temperature extremes	−3.5
I_OUT	Output Current	V_OUT = 1 V from either rail	Sourcing	45	100		mA
I_OUT	Output Current	V_OUT = 1 V from either rail	Sinking	–45	–110		mA
I_SC	Output Short Circuit Current⁽⁵⁾	Sourcing to Ground		120	180		mA
		Sourcing to Ground	At the temperature extremes	100
		Sinking to Ground		120	230
		Sinking to Ground	At the temperature extremes	100
R_IN	Common-Mode Input Resistance				4		MΩ
C_IN	Common-Mode Input Capacitance				1.8		pF
R_OUT	Output Impedance	f = 1 MHz, A_V = +1			0.06		Ω

(1) Typical values represent the most likely parametric norm.

(2) All limits are ensured by testing or statistical analysis.

(3) Positive current corresponds to current flowing into the device.

(4) Slew rate is the "worst case" of the rising and falling slew rates.

(5) Short circuit test is a momentary test. See ^{Note 3} under Absolute Maximum Ratings.

(6) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

6.7 Typical Characteristics

Figure 1. Noninverting Frequency Response, Gain

Figure 3. Noninverting Frequency Response, Phase

Figure 5. Open Loop Gain/Phase vs. Frequency

Figure 7. Phase Margin vs. V_CM

Figure 9. Output vs. Input

Figure 11. PSRR vs. Frequency

Figure 13. Noise vs. Frequency

Figure 15. Output Impedance vs. Frequency

Figure 17. HD vs. V_OUT

Figure 19. HD vs. Frequency

Figure 21. V_OUT vs. I_SOURCE

Figure 23. V_OUT vs. I_SOURCE

Figure 25. Short Circuit Current

Figure 27. Settling Time vs. Output Step Amplitude

Figure 29. 0.1% Settling Time vs. Cap Load

Figure 31. ΔV_OS vs. V_OUT

Figure 33. I_S/Amp vs. V_CM

Figure 35. V_OS vs. V_S (for 3 Representative Units)

Figure 37. V_OS vs. V_S (for 3 Representative Units)

Figure 39. |I_B| vs. V_S

Figure 41. Small Signal Step Response

Figure 43. Small Signal Step Response

Figure 45. Large Signal Step Response

Figure 47. Large Signal Step Response

Figure 2. Inverting Frequency Response, Gain

Figure 4. Inverting Frequency Response, Phase

Figure 6. Unity Gain Frequency vs. V_CM

Figure 8. Output vs. Input

Figure 10. CMRR vs. Frequency

Figure 12. DG/DP vs. IRE

Figure 14. Crosstalk Rejection vs. Frequency

Figure 16. HD vs. V_OUT

Figure 18. THD vs. V_OUT

Figure 20. HD vs. Frequency

Figure 22. V_OUT vs. I_SINK

Figure 24. V_OUT vs. I_SINK

Figure 26. Short Circuit Current

Figure 28. Settling Time vs. Output Step Amplitude

Figure 30. ΔV_OS vs. V_OUT

Figure 32. I_S /Amp vs. V_S

Figure 34. I_S/Amp vs. V_CM

Figure 36. V_OS vs. V_S (for 3 Representative Units)

Figure 38. V_OS vs. V_CM (A Typical Unit)

Figure 40. I_OS vs. V_S

Figure 42. Small Signal Step Response

Figure 44. Small Signal Step Response

Figure 46. Large Signal Step Response