SNAS579G March   2012  – December 2014 LMK00105

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Functional Block Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Diagrams
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Vdd and Vddo Power Supplies
      2. 7.3.2 Clock Input
        1. 7.3.2.1 Selection of Clock Input
          1. 7.3.2.1.1 CLKin/CLKin* Pins
          2. 7.3.2.1.2 OSCin/OSCout Pins
      3. 7.3.3 Clock Outputs
        1. 7.3.3.1 Output Enable Pin
        2. 7.3.3.2 Using Less than Five Outputs
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Clock Inputs
      2. 8.1.2 Clock Outputs
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Block Diagram
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Crystal Interface
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Filtering
    2. 9.2 Power Supply Ripple Rejection
    3. 9.3 Power Supply Bypassing
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Ground Planes
      2. 10.1.2 Power Supply Pins
      3. 10.1.3 Differential Input Termination
      4. 10.1.4 Output Termination
    2. 10.2 Layout Example
    3. 10.3 Thermal Management
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Differential Voltage Measurement Terminology
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

10.1.1 Ground Planes

Solid ground planes are recommended as they provide a low-impedance return paths between the device and its bypass capacitors and its clock source and destination devices. Avoid return paths of other system circuitry (for example, high-speed/digital logic) from passing through the local ground of the device to minimize noise coupling, which could induce added jitter and spurious noise.