10.5.3 Block Register Read
The I2C Block Register Read transaction is illustrated in Figure 75 and consists of the following sequence:
- Master issues a Start Condition.
- Master writes the 7-bit Slave Address followed by a Write bit.
- Master writes the 8-bit Register address as the CommandCode of the programming sequence.
- Master issues a Repeated Start Condition.
- Master writes the 7-bit Slave Address following by a Read bit.
- Slave returns one or more data bytes as long as the Master continues to acknowledge them. The slave increments the internal register address after each byte.
- Master issues a Stop Condition to terminate the transaction.