10.5.1.2.1 Device Configuration and Simulation - PLLatinum Sim
Select the LMK04828 and choose the PLL and VCO to simulate. Make adjustments for more accurate simulations depending on the application. For example:
- Enter the VCO gain of the external VCXO or possible external VCO-used device.
- Adjust the charge pump current to help with loop filter component selection. Lower charge pump currents result in smaller components, but may increase impacts of leakage, and at the lowest values reduce PLL phase-noise performance.
- PLLatinum Sim allows loading a custom phase noise plot for any block. Typically, a custom phase-noise plot is entered for CLKin to match the reference phase noise to device; a phase-noise plot for the VCXO can additionally be provided to match the performance of VCXO used. For improved accuracy in simulation and optimum loop filter design, load these custom noise profiles for use in the application.
- The design tools return with high reference and phase-detector frequencies by default. If desired, experiment with different reference divider settings, phase detector frequencies, and loop bandwidths. Due to the narrow loop bandwidth used on PLL1, it is common to reduce the phase detector frequency on PLL1.