JAJSJN4C May 2020 – November 2022 LMK04832-SP
PRODUCTION DATA
This register provides read back access to CLKinX selection indicator and CLKinX LOS indicator. The 2 MSBs are shared with the RB_DAC_VALUE. See RB_DAC_VALUE section.
BIT | NAME | POR DEFAULT | DESCRIPTION |
---|---|---|---|
7:6 | RB_DAC_VALUE[9:8] | See RB_DAC_VALUE section. | |
5 | RB_CLKin2_SEL | Read back 0: CLKin2 is not selected for input to PLL1. Read back 1: CLKin2 is selected for input to PLL1. | |
4 | RB_CLKin1_SEL | Read back 0: CLKin1 is not selected for input to PLL1. Read back 1: CLKin1 is selected for input to PLL1. | |
3 | RB_CLKin0_SEL | Read back 0: CLKin0 is not selected for input to PLL1. Read back 1: CLKin0 is selected for input to PLL1. | |
2 | N/A | ||
1 | RB_CLKin1_LOS | Read back 1: CLKin1 LOS is active. Read back 0: CLKin1 LOS is not active. | |
0 | RB_CLKin0_LOS | Read back 1: CLKin0 LOS is active. Read back 0: CLKin0 LOS is not active. |