JAJSJN4C May 2020 – November 2022 LMK04832-SP
PRODUCTION DATA
BIT | NAME | POR DEFAULT | DESCRIPTION |
---|---|---|---|
7:5 | NA | 0 | Reserved |
4:0 | HOLDOVER_EXIT_NADJ | 30 | When holdover exists, PLL1 R counter and PLL1 N counter are reset. HOLDOVER_EXIT_NADJ is a 2s complement number which provides a relative timing offset between PLL1 R and PLL1 N divider. |