JAJSJN4C May 2020 – November 2022 LMK04832-SP
PRODUCTION DATA
BIT | NAME | POR DEFAULT | DESCRIPTION |
---|---|---|---|
7:2 | NA | 0 | Reserved |
1 | CLR_PLL1_LD_LOST | 0 | To reset RB_PLL1_LD_LOST, write CLR_PLL1_LD_LOST with 1 and then 0. 0: RB_PLL1_LD_LOST will be set on next falling PLL1 DLD edge. 1: RB_PLL1_LD_LOST is held clear (0). User must clear this bit to allow RB_PLL1_LD_LOST to become set again. |
0 | CLR_PLL2_LD_LOST | 0 | To reset RB_PLL2_LD_LOST, write CLR_PLL2_LD_LOST with 1 and then 0. 0: RB_PLL2_LD_LOST will be set on next falling PLL2 DLD edge. 1: RB_PLL2_LD_LOST is held clear (0). User must clear this bit to allow RB_PLL2_LD_LOST to become set again. |