JAJSJN4C May 2020 – November 2022 LMK04832-SP
PRODUCTION DATA
The LMK04832-SP features a total of 14 PLL2 clock outputs driven from the internal or external VCO.
All clock outputs have programmable output types. They can be programmed to CML, LVPECL, LVDS, HSDS, or LCPECL. All odd clock outputs plus CLKout8 and CLKout10 may be programmed to LVCMOS.
If OSCout is included in the total number of clock outputs the LMK04832-SP is able to distribute up to 15 differential clocks. OSCout may be a buffered version of OSCin, DCLKout6, DCLKout8, or SYSREF. Its output format is programmable to LVDS, LVPECL, or LVCMOS.
The following sections discuss specific features of the clock distribution channels that allow the user to control various aspects of the output clocks.