JAJSFI6C Februray 2017 – May 2018 LMK04832
PRODUCTION DATA.
The difference in the tables is that some of the clock outputs have inverted CMOS polarity settings.
BIT | NAME | POR DEFAULT | DESCRIPTION | ||
---|---|---|---|---|---|
7:4 | CLKoutY_FMT | 0 | Set CLKoutY clock format | ||
Field Value | Output Format | ||||
0 (0x00) | Powerdown | ||||
1 (0x01) | LVDS | ||||
2 (0x02) | HSDS 6 mA | ||||
3 (0x03) | HSDS 8 mA | ||||
4 (0x04) | LVPECL 1600 mV | ||||
5 (0x05) | LVPECL 2000 mV | ||||
6 (0x06) | LCPECL | ||||
7 (0x07) | CML 16 mA | ||||
8 (0x08) | CML 24 mA | ||||
9 (0x09) | CML 32 mA | ||||
10 (0x0A) | CMOS (Off/Inv) | ||||
11 (0x0B) | CMOS (Norm/Off) | ||||
12 (0x0C) | CMOS (Inv/Inv) | ||||
13 (0x0D) | CMOS (Inv/Norm) | ||||
14 (0x0E) | CMOS (Norm/Inv) | ||||
15 (0x0F) | CMOS (Norm/Norm) | ||||
3:0 | CLKoutX_FMT | 0 | Set CLKoutX clock format | ||
Field Value | Output Format
DCLKX_BYP = 0 |
Output Format
DCLKX_BYP = 1 |
|||
0 (0x00) | Powerdown | Reserved | |||
1 (0x01) | LVDS | Reserved | |||
2 (0x02) | HSDS 6 mA | Reserved | |||
3 (0x03) | HSDS 8 mA | Reserved | |||
4 (0x04) | LVPECL 1600 mV | Reserved | |||
5 (0x05) | LVPECL 2000 mV | Reserved | |||
6 (0x06) | LCPECL | Reserved | |||
7 (0x07) | Reserved | CML 16 mA | |||
8 (0x08) | Reserved | CML 24 mA | |||
9 (0x09) | Reserved | CML 32 mA | |||
10 (0x0A) | CMOS (Off/Inv)(1) | Reserved | |||
11 (0x0B) | CMOS (Norm/Off)(1) | Reserved | |||
12 (0x0C) | CMOS (Inv/Inv)(1) | Reserved | |||
13 (0x0D) | CMOS (Inv/Norm)(1) | Reserved | |||
14 (0x0E) | CMOS (Norm/Inv)(1) | Reserved | |||
15 (0x0F) | CMOS (Norm/Norm)(1) | Reserved |
BIT | NAME | POR DEFAULT | DESCRIPTION | ||
---|---|---|---|---|---|
7:4 | CLKoutY_FMT | 0 | Set CLKoutY clock format | ||
Field Value | Output Format | ||||
0 (0x00) | Powerdown | ||||
1 (0x01) | LVDS | ||||
2 (0x02) | HSDS 6 mA | ||||
3 (0x03) | HSDS 8 mA | ||||
4 (0x04) | LVPECL 1600 mV | ||||
5 (0x05) | LVPECL 2000 mV | ||||
6 (0x06) | LCPECL | ||||
7 (0x07) | CML 16 mA | ||||
8 (0x08) | CML 24 mA | ||||
9 (0x09) | CML 32 mA | ||||
10 (0x0A) | CMOS (Off/Norm) | ||||
11 (0x0B) | CMOS (Inv/Off) | ||||
12 (0x0C) | CMOS (Norm/Norm) | ||||
13 (0x0D) | CMOS (Norm/Inv) | ||||
14 (0x0E) | CMOS (Inv/Norm) | ||||
15 (0x0F) | CMOS (Inv/Inv) | ||||
3:0 | CLKoutX_FMT | 0 | Set CLKoutX clock format | ||
Field Value | Output Format
DCLKX_BYP = 0 |
Output Format
DCLKX_BYP = 1 |
|||
0 (0x00) | Powerdown | Reserved | |||
1 (0x01) | LVDS | Reserved | |||
2 (0x02) | HSDS 6 mA | Reserved | |||
3 (0x03) | HSDS 8 mA | Reserved | |||
4 (0x04) | LVPECL 1600 mV | Reserved | |||
5 (0x05) | LVPECL 2000 mV | Reserved | |||
6 (0x06) | LCPECL | Reserved | |||
7 (0x07) | Reserved | CML 16 mA | |||
8 (0x08) | Reserved | CML 24 mA | |||
9 (0x09) | Reserved | CML 32 mA | |||
10 (0x0A) | CMOS (Off/Norm)(1) | Reserved | |||
11 (0x0B) | CMOS (Inv/Off)(1) | Reserved | |||
12 (0x0C) | CMOS (Norm/Norm)(1) | Reserved | |||
13 (0x0D) | CMOS (Norm/Inv)(1) | Reserved | |||
14 (0x0E) | CMOS (Inv/Norm)(1) | Reserved | |||
15 (0x0F) | CMOS (Inv/Inv)(1) | Reserved |