JAJSFM4A December 2018 – December 2018 LMK05318
PRODUCTION DATA.
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The HW_SW_CTRL input pin selects the device start-up mode that determines the memory page (EEPROM or ROM) used to initialize the registers, the serial interface, and the logic pin functions at power-on reset. The initial register settings determine the device's frequency configuration on start-up. After start-up, the device registers can be accessed through the serial interface for device monitoring and programming, and the logic pins will function as defined by the selected mode.
HW_SW_CTRL
INPUT LEVEL(1) |
START-UP MODE | MODE DESCRIPTION |
---|---|---|
0 | EEPROM + I2C
(Soft pin mode) |
Registers are initialized from EEPROM, and I2C interface is enabled.
Logic pins:
|
Float
(VIM) |
EEPROM + SPI
(Soft pin mode) |
Registers are initialized from EEPROM, and SPI interface is enabled.
Logic pins:
|
1 | ROM + I2C
(Hard pin mode) |
Registers are initialized from the ROM page selected by GPIO pins, and I2C interface is enabled.
Logic pins:
|
NOTE
To ensure proper start-up into EEPROM + SPI Mode, the HW_SW_CTRL, STATUS0, and STATUS1 pins must all be floating or biased to VIM (0.8-V typical) before the PDN pin is pulled high. These three pins momentarily operate as 3-level inputs and get sampled at the low-to-high transition of PDN to determine the device start-up mode during POR. If any of these pins are connected to a system host (MCU or FPGA), TI recommends using external biasing resistors on each pin (10-kΩ pullup to 3.3 V with 3.3-kΩ pulldown to GND) to set the inputs to VIM during POR. After power-up, the STATUS pins can operate as LVCMOS outputs to overdrive the external resistor bias for normal status operation.