JAJSJO2B March 2022 – July 2022 LMK5B33216
PRODUCTION DATA
When a loss-of-reference (LOR) condition is detected and no valid input is available the DPLL enters holdover.
If history is disabled (DPLLx_HIST_EN = 0) the DPLL will use the 2s complement DPLLx_FREE_RUN[39:0] field which sets holdover frequency relative to the DPLL numerator. Short-term frequency accuracy is based on the accuracy of the DPLLx_FREE_RUN field.
If history is enabled (DPLLx_HIST_EN = 1) but the tuning history is not yet valid, then the DPLLx_FREE_RUN field is used as if DPLLx_HIST_EN was disabled. If the tuning history is valid, the DPLL enters holdover using historical data to minimize holdover frequency error. See Section 8.3.7.4. In general, the longer the historical average time, the more accurate the initial holdover frequency assuming the 0-ppm reference clock (XO input) is drift-free. The stability of the XO reference clock determines the long-term stability and accuracy of the holdover output frequency.
Upon entry into holdover, the LOPL flag will be asserted (LOPL → 1). The LOFL flag reports DPLL frequency versus reference frequency is in tolerance. In holdover LOFL will remain unchanged in holdover and not update until a valid reference is once again selected.
When a valid input becomes available for selection, the DPLL will exit holdover mode and automatically phase lock with the new input clock without any output glitches.