JAJSCC0C June   2016  – November 2017 LMK60A0-148351 , LMK60A0-148M , LMK60E0-156257 , LMK60E2-150M

PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
4. 4 改訂履歴
5. 5 Pin Configuration and Functions
6. 6 Specifications
   1. 6.1  Absolute Maximum Ratings
   2. 6.2  ESD Ratings
   3. 6.3  Recommended Operating Conditions
   4. 6.4  Thermal Information
   5. 6.5  Electrical Characteristics - Power Supply
   6. 6.6  LVPECL Output Characteristics
   7. 6.7  LVDS Output Characteristics
   8. 6.8  HCSL Output Characteristics
   9. 6.9  OE Input Characteristics
   10. 6.10 Frequency Tolerance Characteristics
   11. 6.11 Power-On/Reset Characteristics (VDD)
   12. 6.12 PSRR Characteristics
   13. 6.13 PLL Clock Output Jitter Characteristics
   14. 6.14 Additional Reliability and Qualification
   15. 6.15 Typical Characteristics
7. 7 Parameter Measurement Information
   1. 7.1 Device Output Configurations
8. 8 Power Supply Recommendations
9. 9 Layout
   1. 9.1 Layout Guidelines
      1. 9.1.1 Ensuring Thermal Reliability
      2. 9.1.2 Best Practices for Signal Integrity
      3. 9.1.3 Recommended Solder Reflow Profile
10. 10デバイスおよびドキュメントのサポート
    1. 10.1 関連リンク
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 コミュニティ・リソース
    4. 10.4 商標
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 Glossary
11. 11メカニカル、パッケージ、および注文情報