JAJSDN5E December   2016  – December 2023 LMK62A2-100M , LMK62A2-150M , LMK62A2-156M , LMK62A2-200M , LMK62A2-266M , LMK62E0-156M , LMK62E2-100M , LMK62E2-156M , LMK62I0-100M , LMK62I0-156M

PRODUCTION DATA  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Pin Configuration and Functions
6. 5 Specifications
   1. 5.1  Absolute Maximum Ratings
   2. 5.2  ESD Ratings
   3. 5.3  Recommended Operating Conditions
   4. 5.4  Thermal Information
   5. 5.5  Electrical Characteristics - Power Supply
   6. 5.6  LVPECL Output Characteristics
   7. 5.7  LVDS Output Characteristics
   8. 5.8  HCSL Output Characteristics
   9. 5.9  OE Input Characteristics
   10. 5.10 Frequency Tolerance Characteristics
   11. 5.11 Power-On/Reset Characteristics (VDD)
   12. 5.12 PSRR Characteristics
   13. 5.13 PLL Clock Output Jitter Characteristics
   14. 5.14 Additional Reliability and Qualification
7. 6 Parameter Measurement Information
   1. 6.1 Device Output Configurations
8. 7 Application and Implementation
   1. 7.1 Power Supply Recommendations
   2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
         1. 7.2.1.1 Ensuring Thermal Reliability
         2. 7.2.1.2 Best Practices for Signal Integrity
         3. 7.2.1.3 Recommended Solder Reflow Profile
9. 8 Device and Documentation Support
   1. 8.1 ドキュメントの更新通知を受け取る方法
   2. 8.2 サポート・リソース
   3. 8.3 Trademarks
   4. 8.4 静電気放電に関する注意事項
   5. 8.5 用語集
10. 9 Revision History
11. 10Mechanical, Packaging, and Orderable Information