SNOSAI9I September   2005  – November 2015 LMP7701 , LMP7702 , LMP7704

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics 3-V
    6. 7.6 Electrical Characteristics 5-V
    7. 7.7 Electrical Characteristics ±5-V
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Capacitive Load
      2. 8.3.2 Input Capacitance
      3. 8.3.3 Diodes Between the Inputs
    4. 8.4 Device Functional Modes
      1. 8.4.1 Precision Current Source
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Low Input Voltage Noise
      2. 9.1.2 Total Noise Contribution
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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7 Specifications

7.1 Absolute Maximum Ratings

See (1)(2)
MIN MAX UNIT
VIN differential ±300 mV
Supply voltage (VS = V+ – V−) 13.2 V
Voltage at input/output pins V++ 0.3, V− − 0.3 V
Input current 10 mA
Junction temperature (3) +150 °C
Soldering information    Infrared or convection (20 sec) 235 °C
Wave soldering lead temp. (10 sec) 260 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/ Distributors for availability and specifications.
(3) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(3) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine Model (MM) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
Temperature range (2) −40 125 °C
Supply voltage (VS = V+ – V−) 2.7 12 V

7.4 Thermal Information

THERMAL METRIC(1) LMP7701 LMP7701, LMP7702 LMP7702 LMP7704 UNIT
DBV
(SOT-23)		 D
(SOIC)		 DGK
(VSSOP)		 D
(SOIC)		 PW
(TSSOP)
5 PINS 8 PINS 8 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance (2) 122.9 114.3 167.5 79.9 107.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 69.3 59.5 58.7 36.9 33.0 °C/W
RθJB Junction-to-board thermal resistance 63.3 54.8 87.5 34.7 50.4 °C/W
ψJT Junction-to-top characterization parameter 19.4 12.1 6.6 5.5 1.8 °C/W
ψJB Junction-to-board characterization parameter 62.8 54.2 86.1 34.4 49.7 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

7.5 Electrical Characteristics 3-V

Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 3 V, V− = 0 V, VCM = V+/2, and RL > 10 kΩ to V+/2.(1)
PARAMETER TEST CONDITIONS MIN (3) TYP (2) MAX (3) UNIT
VOS Input Offset Voltage LMP7701 ±37 ±200 μV
at the temperature extremes ±500
LMP7702/LMP7704 ±56 ±220
at the temperature extremes ±520
TCVOS Input Offset Voltage Temperature Drift See (4) ±1 μV/°C
at the temperature extremes ±5
IB Input Bias Current See (4) (5)
−40°C ≤ TA ≤ 85°C		 ±0.2 ±1 pA
at the temperature extremes ±50
See (4) (5)
−40°C ≤ TA ≤ 125°C		 ±0.2 ±1
at the temperature extremes ±400
IOS Input Offset Current 40 fA
CMRR Common-Mode Rejection Ratio 0 V ≤ VCM ≤ 3 V
LMP7701		 86 130 dB
at the temperature extremes 80
0 V ≤ VCM ≤ 3 V
LMP7702/LMP7704		 84 130
at the temperature extremes 78
PSRR Power Supply Rejection Ratio 2.7 V ≤ V+ ≤ 12 V, Vo = V+/2 86 98 dB
at the temperature extremes 82
CMVR Common-Mode Voltage Range CMRR ≥ 80 dB –0.2 3.2 V
CMRR ≥ 77 dB at the temperature extremes –0.2 3.2
AVOL Open-Loop Voltage Gain RL = 2 kΩ (LMP7701)
VO = 0.3 V to 2.7 V		 100 114 dB
at the temperature extremes 96
RL = 2 kΩ (LMP7702/LMP7704)
VO = 0.3 V to 2.7 V		 100 114
at the temperature extremes 94
RL = 10 kΩ
VO = 0.2 V to 2.8 V		 100 124
at the temperature extremes 96
VOUT Output Voltage Swing High RL = 2 kΩ to V+/2
LMP7701		 40 80 mV
from V+
at the temperature extremes 120
RL = 2 kΩ to V+/2
LMP7702/LMP7704		 40 80
at the temperature extremes 150
RL = 10 kΩ to V+/2
LMP7701		 30 40
at the temperature extremes 60
RL = 10 kΩ to V+/2
LMP7702/LMP7704		 35 50
at the temperature extremes 100
Output Voltage Swing Low RL = 2 kΩ to V+/2
LMP7701		 40 60 mV
at the temperature extremes 80
RL = 2 kΩ to V+/2
LMP7702/LMP7704		 45 100
at the temperature extremes 170
RL = 10 kΩ to V+/2
LMP7701		 20 40
at the temperature extremes 50
RL = 10 kΩ to V+/2
LMP7702/LMP7704		 20 50
at the temperature extremes 90
IOUT Output Current (8) (6) Sourcing VO = V+/2
VIN = 100 mV		 25 42 mA
at the temperature extremes 15
Sinking VO = V+/2
VIN = −100 mV (LMP7701)		 25 42
at the temperature extremes 20
Sinking VO = V+/2
VIN = −100 mV (LMP7702/LMP7704)		 25 42
at the temperature extremes 15
IS Supply Current LMP7701 0.670 1 mA
at the temperature extremes 1.2
LMP7702 1.4 1.8
at the temperature extremes 2.1
LMP7704 2.9 3.5
at the temperature extremes 4.5
SR Slew Rate (7) AV = +1, VO = 2 VPP
10% to 90%		 0.9 V/μs
GBW Gain Bandwidth 2.5 MHz
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, R.L = 10 kΩ 0.02%
en Input Referred Voltage Noise Density f = 1 kHz 9 nV/√Hz
in Input Referred Current Noise Density f = 100 kHz 1 fA/√Hz
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material.
(3) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the Statistical Quality Control (SQC) method.
(4) This parameter is specified by design and/or characterization and is not tested in production.
(5) Positive current corresponds to current flowing into the device.
(6) The short circuit test is a momentary test.
(7) The number specified is the slower of positive and negative slew rates.
(8) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

7.6 Electrical Characteristics 5-V

Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5 V, V− = 0 V, VCM = V+/2, and RL > 10 kΩ to V+/2.(1)
PARAMETER TEST CONDITIONS MIN (3) TYP (2) MAX (3) UNIT
VOS Input Offset Voltage LMP7701 ±37 ±200 μV
at the temperature extremes ±500
LMP7702/LMP7704 ±32 ±220
at the temperature extremes ±520
TCVOS Input Offset Voltage Temperature Drift See (4) ±1 ±5 μV/°C
at the temperature extremes
IB Input Bias Current See (4) (5)
−40°C ≤ TA ≤ 85°C		 ±0.2 ±1 pA
at the temperature extremes ±50
See (4) (5)
−40°C ≤ TA ≤ 125°C		 ±0.2 ±1
at the temperature extremes ±400
IOS Input Offset Current 40 fA
CMRR Common-Mode Rejection Ratio 0 V ≤ VCM ≤ 5 V
LMP7701		 88 130 dB
at the temperature extremes 83
0 V ≤ VCM ≤ 5 V
LMP7702/LMP7704		 86 130
at the temperature extremes 81
PSRR Power Supply Rejection Ratio 2.7 V ≤ V+ ≤ 12 V, VO = V+/2 86 100 dB
at the temperature extremes 82
CMVR Common-Mode Voltage Range CMRR ≥ 80 dB –0.2 5.2 V
CMRR ≥ 78 dB at the temperature extremes –0.2 5.2
AVOL Open-Loop Voltage Gain RL = 2 kΩ (LMP7701)
VO = 0.3 V to 4.7 V		 100 119 dB
at the temperature extremes 96
RL = 2 kΩ (LMP7702/LMP7704)
VO = 0.3 V to 4.7 V		 100 119
at the temperature extremes 94
RL = 10 kΩ
VO = 0.2 V to 4.8 V 		100 130
at the temperature extremes 96
VOUT Output Voltage Swing High RL = 2 kΩ to V+/2
LMP7701		 60 110 mV
from V+
at the temperature extremes 130
RL = 2 kΩ to V+/2
LMP7702/LMP7704		 60 120
at the temperature extremes 200
RL = 10 kΩ to V+/2
LMP7701		 40 50
at the temperature extremes 70
RL = 10 kΩ to V+/2
LMP7702/LMP7704		 40 60
at the temperature extremes 120
Output Voltage Swing Low RL = 2 kΩ to V+/2
LMP7701		 50 80 mV
at the temperature extremes 90
RL = 2 kΩ to V+/2
LMP7702/LMP7704		 50 120
at the temperature extremes 190
RL = 10 kΩ to V+/2
LMP7701		 30 40
at the temperature extremes 50
RL = 10 kΩ to V+/2
LMP7702/LMP7704		 30 50
at the temperature extremes 100
IOUT Output Current (8) (6) Sourcing VO = V+/2
VIN = 100 mV (LMP7701)		 40 66 mA
at the temperature extremes 28
Sourcing VO = V+/2
VIN = 100 mV (LMP7702/LMP7704)		 38 66
at the temperature extremes 25
Sinking VO = V+/2
VIN = −100 mV (LMP7701)		 40 76
at the temperature extremes 28
Sinking VO = V+/2
VIN = −100 mV (LMP7702/LMP7704)		 40 76
at the temperature extremes 23
IS Supply Current LMP7701 0.715 1 mA
at the temperature extremes 1.2
LMP7702 1.5 1.9
at the temperature extremes 2.2
LMP7704 2.9 3.7
at the temperature extremes 4.6
SR Slew Rate (7) AV = +1, VO = 4 VPP
10% to 90%		 1 V/μs
GBW Gain Bandwidth 2.5 MHz
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, RL = 10 kΩ 0.02%
en Input Referred Voltage Noise Density f = 1 kHz 9 nV/√Hz
in Input Referred Current Noise Density f = 100 kHz 1 fA/√Hz
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(3) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the Statistical Quality Control (SQC) method.
(4) This parameter is specified by design and/or characterization and is not tested in production.
(5) Positive current corresponds to current flowing into the device.
(6) The short circuit test is a momentary test.
(7) The number specified is the slower of positive and negative slew rates.
(8) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

7.7 Electrical Characteristics ±5-V

Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5 V, V− = −5 V, VCM = 0 V, and RL > 10 kΩ to 0 V.(1)
PARAMETER TEST CONDITIONS MIN (3) TYP (2) MAX (3) UNIT
VOS Input Offset Voltage LMP7701 ±37 ±200 μV
at the temperature extremes ±500
LMP7702/LMP7704 ±37 ±220
at the temperature extremes ±520
TCVOS Input Offset Voltage Temperature Drift See  (4) ±1 μV/°C
at the temperature extremes ±5
IB Input Bias Current See (4) (5)
−40°C ≤ TA ≤ 85°C		 ±0.2 1 pA
at the temperature extremes ±50
See (4) (5)
−40°C ≤ TA ≤ 125°C		 ±0.2 1
at the temperature extremes ±400
IOS Input Offset Current 40 fA
CMRR Common-Mode Rejection Ratio −5 V ≤ VCM ≤ 5 V
LMP7701		 92 138 dB
at the temperature extremes 88
−5 V ≤ VCM ≤ 5 V
LMP7702/LMP7704		 90 138
at the temperature extremes 86
PSRR Power Supply Rejection Ratio 2.7 V ≤ V+ ≤ 12 V, VO = 0 V 86 98 dB
at the temperature extremes 82
CMVR Common-Mode Voltage Range CMRR ≥ 80 dB −5.2 5.2 V
CMRR ≥ 78 dB at the temperature extremes −5.2 5.2
AVOL Open Loop Voltage Gain RL = 2 kΩ (LMP7701)
VO = −4.7 V to 4.7 V 		100 121 dB
at the temperature extremes 98
RL = 2 kΩ (LMP7702/LMP7704)
VO = −4.7 V to 4.7 V		 100 121
at the temperature extremes 94
RL = 10 kΩ (LMP7701)
VO = −4.8 V to 4.8 V		 100 134
at the temperature extremes 98
RL = 10 kΩ (LMP7702/LMP7704)
VO = −4.8 V to 4.8 V		 100 134
at the temperature extremes 97
VOUT Output Voltage Swing High RL = 2 kΩ to 0 V
LMP7701		 90 150 mV
from V+
at the temperature extremes 170
RL = 2 kΩ to 0 V
LMP7702/LMP7704		 90 180
at the temperature extremes 290
RL = 10 kΩ to 0 V
LMP7701		 40 80
at the temperature extremes 100
RL = 10 kΩ to 0 V
LMP7702/LMP7704		 40 80
at the temperature extremes 150
Output Voltage Swing Low RL = 2 kΩ to 0 V
LMP7701		 90 130 mV
from V–
at the temperature extremes 150
RL = 2 kΩ to 0 V
LMP7702/LMP7704		 90 180
at the temperature extremes 260
RL = 10 kΩ to 0 V
LMP7701		 40 50
at the temperature extremes 60
RL = 10 kΩ to 0 V
LMP7702/LMP7704		 40 60
at the temperature extremes 110
IOUT Output Current (8) (6) Sourcing VO = 0 V
VIN = 100 mV (LMP7701)		 50 86 mA
at the temperature extremes 35
Sourcing VO = 0 V
VIN = 100 mV (LMP7702/LMP7704)		 48 86
at the temperature extremes 33
Sinking VO = 0 V
VIN = −100 mV		 50 84
at the temperature extremes 35
IS Supply Current LMP7701 0.790 1.1 mA
at the temperature extremes 1.3
LMP7702 1.7 2.1
at the temperature extremes 2.5
LMP7704 3.2 4.2
at the temperature extremes 5
SR Slew Rate (7) AV = +1, VO = 9 VPP
10% to 90% 		1.1 V/μs
GBW Gain Bandwidth 2.5 MHz
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, RL = 10 kΩ 0.02%
en Input Referred Voltage Noise Density f = 1 kHz 9 nV/√Hz
in Input Referred Current Noise Density f = 100 kHz 1 fA/√Hz
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(3) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the Statistical Quality Control (SQC) method.
(4) This parameter is specified by design and/or characterization and is not tested in production.
(5) Positive current corresponds to current flowing into the device.
(6) The short circuit test is a momentary test.
(7) The number specified is the slower of positive and negative slew rates.
(8) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

7.8 Typical Characteristics

TA = 25°C, VCM = VS/2, RL > 10 kΩ (unless otherwise noted)
LMP7701 LMP7702 LMP7704 20127336.gif Figure 1. Offset Voltage Distribution
LMP7701 LMP7702 LMP7704 20127337.gif Figure 2. Offset Voltage Distribution
LMP7701 LMP7702 LMP7704 20127338.gif Figure 4. Offset Voltage Distribution
LMP7701 LMP7702 LMP7704 20127306.gif Figure 6. Offset Voltage vs Temperature
LMP7701 LMP7702 LMP7704 20127310.gif Figure 8. Offset Voltage vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127308.gif Figure 10. Offset Voltage vs VCM
LMP7701 LMP7702 LMP7704 20127346.gif Figure 12. Input Bias Current vs VCM
LMP7701 LMP7702 LMP7704 20127347.gif Figure 14. Input Bias Current vs VCM
LMP7701 LMP7702 LMP7704 20127348.gif Figure 16. Input Bias Current vs VCM
LMP7701 LMP7702 LMP7704 20127345.gif Figure 18. PSRR vs Frequency
LMP7701 LMP7702 LMP7704 20127313.gif Figure 20. Sinking Current vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127316.gif Figure 22. Output Voltage vs Output Current
LMP7701 LMP7702 LMP7704 20127315.gif Figure 24. Open-Loop Frequency Response
LMP7701 LMP7702 LMP7704 20127318.gif Figure 26. Large Signal Step Response
LMP7701 LMP7702 LMP7704 20127319.gif Figure 28. Large Signal Step Response
LMP7701 LMP7702 LMP7704 20127327.gif Figure 30. Input Voltage Noise vs Frequency
LMP7701 LMP7702 LMP7704 20127333.gif Figure 32. Output Swing High vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127332.gif Figure 34. Output Swing High vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127328.gif Figure 36. THD+N vs Frequency
LMP7701 LMP7702 LMP7704 20127353.gif Figure 38. Crosstalk Rejection Ratio vs Frequency (LMP7702/LMP7704)
LMP7701 LMP7702 LMP7704 20127341.gif Figure 1. TCVOS Distribution
LMP7701 LMP7702 LMP7704 20127342.gif Figure 3. TCVOS Distribution
LMP7701 LMP7702 LMP7704 20127343.gif Figure 5. TCVOS Distribution
LMP7701 LMP7702 LMP7704 20127350.gif Figure 7. CMRR vs Frequency
LMP7701 LMP7702 LMP7704 20127307.gif Figure 9. Offset Voltage vs VCM
LMP7701 LMP7702 LMP7704 20127309.gif Figure 11. Offset Voltage vs VCM
LMP7701 LMP7702 LMP7704 20127330.gif Figure 13. Input Bias Current vs VCM
LMP7701 LMP7702 LMP7704 20127331.gif Figure 15. Input Bias Current vs VCM
LMP7701 LMP7702 LMP7704 20127349.gif Figure 17. Input Bias Current vs VCM
LMP7701 LMP7702 LMP7704 20127311.gif Figure 19. Supply Current vs Supply Voltage (Per Channel)
LMP7701 LMP7702 LMP7704 20127312.gif Figure 21. Sourcing Current vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127317.gif Figure 23. Slew Rate vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127314.gif Figure 25. Open-Loop Frequency Response
LMP7701 LMP7702 LMP7704 20127320.gif Figure 27. Small Signal Step Response
LMP7701 LMP7702 LMP7704 20127326.gif Figure 29. Small Signal Step Response
LMP7701 LMP7702 LMP7704 20127352.gif Figure 31. Open Loop Gain vs Output Voltage Swing
LMP7701 LMP7702 LMP7704 20127335.gif Figure 33. Output Swing Low vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127334.gif Figure 35. Output Swing Low vs Supply Voltage
LMP7701 LMP7702 LMP7704 20127329.gif Figure 37. THD+N vs Output Voltage