JAJSKX8C December   2020  – March 2022 LMP7704-SP

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 5 V
    6. 6.6 Electrical Characteristics: VS = 10 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Radiation Hardened Performance
      2. 7.3.2 Engineering Model (Devices With /EM Suffix)
      3. 7.3.3 Capacitive Load
      4. 7.3.4 Input Capacitance
      5. 7.3.5 Diodes Between the Inputs
    4. 7.4 Device Functional Modes
      1. 7.4.1 Precision Current Source
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Low Input Voltage Noise
      2. 8.1.2 Total Noise Contribution
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = 25°C, VCM = VS/2, and RL > 10 kΩ (unless otherwise noted)

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Figure 6-1 Offset Voltage Distribution
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Figure 6-3 Offset Voltage Distribution
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Figure 6-5 Offset Voltage Distribution
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Figure 6-7 Offset Voltage vs Temperature
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Figure 6-9 Offset Voltage vs Supply Voltage
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Figure 6-11 Offset Voltage vs VCM
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Figure 6-13 Input Bias Current vs VCM
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Figure 6-15 Input Bias Current vs VCM
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Figure 6-17 Input Bias Current vs VCM
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Figure 6-19 PSRR vs Frequency
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Figure 6-21 Sinking Current vs Supply Voltage
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Figure 6-23 Output Voltage vs Output Current
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Figure 6-25 Open-Loop Frequency Response
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Figure 6-27 Large Signal Step Response
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Figure 6-29 Large Signal Step Response
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Figure 6-31 Input Voltage Noise vs Frequency
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Figure 6-33 Output Swing High vs Supply Voltage
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Figure 6-35 Output Swing High vs Supply Voltage
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Figure 6-37 THD+N vs Frequency
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Figure 6-39 Crosstalk Rejection Ratio vs Frequency (LMP7702/LMP7704)
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Figure 6-2 TCVOS Distribution
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Figure 6-4 TCVOS Distribution
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Figure 6-6 TCVOS Distribution
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Figure 6-8 CMRR vs Frequency
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Figure 6-10 Offset Voltage vs VCM
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Figure 6-12 Offset Voltage vs VCM
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Figure 6-14 Input Bias Current vs VCM
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Figure 6-16 Input Bias Current vs VCM
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Figure 6-18 Input Bias Current vs VCM
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Figure 6-20 Supply Current vs Supply Voltage (Per Channel)
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Figure 6-22 Sourcing Current vs Supply Voltage
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Figure 6-24 Slew Rate vs Supply Voltage
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Figure 6-26 Open-Loop Frequency Response
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Figure 6-28 Small Signal Step Response
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Figure 6-30 Small Signal Step Response
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Figure 6-32 Open Loop Gain vs Output Voltage Swing
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Figure 6-34 Output Swing Low vs Supply Voltage
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Figure 6-36 Output Swing Low vs Supply Voltage
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Figure 6-38 THD+N vs Output Voltage