For proper operation, decouple the power supplies. To decouple the supply, place a 1nF to 100nF capacitor as close as possible to the op-amp power-supply pins. For single-supply configurations, place a capacitor between the V+ and V– supply pins. For dual-supply configurations, place one capacitor between V+ and ground, and place a second capacitor between V– and ground. Bypass capacitors must have a low ESR of less than 0.1Ω.

The LMP7704-SP uses an internal clamping structure to prevent (V+) – (V–) from exceeding a safe level during ESD events. While this clamp is not active under typical operating conditions, extensive SEE testing with decapped devices has shown the structure can be activated during a ion strike. In flight, this is an extremely low-probability event that assumes the particle can penetrate or bypass the metal lid or ceramic package body, and strike a particular location on the die. If this clamping event occurs, the local positive rail and negative rail are clamped to approximately V_S = 1.4V (typically V+ = 0.7V, V– = –0.7V for bipolar supplies) before being released and recharging to pre-strike levels. The discharge is extremely fast, on the order of microseconds, while the recovery time depends on how quickly the power supply can recharge the decoupling and parasitic capacitances on the supply rail. When the supply voltage drops in this manner, the device output can be disrupted as the output saturates into the rail, which is typically observable as an SET.

If a decoupling capacitance is present on the supply pins, that capacitance is discharged through the clamping structure, dumping the stored charge into the device. If a sufficiently large charge bucket is present on the supply, and there is insufficient series impedance between the capacitor and supply pin, discharge currents large enough to cause localized electrical overstress (EOS) and device damage can develop. This can lead to shoot-through currents between the supplies. Damage has been observed during SEL testing of decapped units under specific circuit conditions. Damaged units had supply voltages above V_S = 5.2V and decoupling capacitances equal to or in excess of 1100nF, during a series of ion strikes with LET = 75 MeV⋅cm²/mg. Devices with 100nF or less of decoupling capacitance were not damaged and passed to the full-rated voltage, including at 125°C. See also the LMP7704-SP SEE Report.

To mitigate this risk, use only decoupling capacitors of 100nF or less directly at the supply pins. If additional bulk capacitance is present on the supply, use a series resistor in the supply line for isolation. In the event the clamp activates, the resistance limits the current into the supply pin to acceptable levels. Board parasitics and spacing, circuit configuration, and device-to-device variation have been observed to play a role in the device response to clamping events, so specific values vary by application. If for example a 100nF capacitor is placed at the supply pin, and a 1µF bulk capacitor is present on the other side of the isolation resistor and several inches from the device, a small resistance such as 1Ω can likely be used. If however a bulk capacitance of 1µF is used immediately adjacent, then a isolation resistance of 5Ω is recommended. If input signals exceed ±1V, include sufficient series resistance between the input signal and input pin, such that during a clamping event the current into the input cannot exceed 10mA.