JAJSUP1B February 2015 – December 2024 LMR14030
PRODUCTION DATA
PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
fSW | Switching frequency | RT = 49.9 kΩ, 1% accuracy | 400 | 500 | 600 | kHz |
VSYNC_HI | SYNC clock high level threshold | 1.7 | V | |||
VSYNC_LO | SYNC clock low level threshold | 0.5 | ||||
TSYNC_MIN | Minimum SYNC input pulse width | Measured at 500 kHz, VSYNC_HI > 3 V, VSYNC_LO < 0.3 V | 30 | ns | ||
TLOCK_IN | PLL lock in time | Measured at 500 kHz | 100 | µs | ||
TON_MIN | Minimum controllable on time | VIN = 12 V, ILoad = 1 A | 75 | ns | ||
DMAX | Maximum duty cycle | fSW = 200 kHz | 97 | % |